Semiconductor and method of fabricating
a technology of semiconductors and manufacturing methods, applied in the direction of semiconductor devices, basic electric elements, electrical equipment, etc., can solve the problems of negative charge on the wafer surface, discharge damage, and/or gate oxide blowout, so as to reduce the potential drop across the semiconductor wafer and minimize the effect of harmful effects
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[0014] The present invention provides a sacrificial structure and fabrication method for ensuring that the potential drop across an insulating layer such as a gate oxide is reduced during damaging plasma and / or ion beam processing. For instance, FIG. 1 illustrates typical prior art structure comprising a semiconductor substrate 6 with a gate oxide 8 thereon and a gate conductor 10 located above gate oxide 8. When subjected to ion beam or plasma processing, a potential drop will exist between the gate conductor 10 and the exposed surface of semiconductor substrate 6. As discussed above, this potential drop can result in wafer charging, leakage paths, and especially dielectric breakdown of the gate oxide, particularly in structures wherein such is relatively thin.
[0015] Reference to FIGS. 2-10 illustrates various means for overcoming this problem. For instance, FIG. 2 illustrates a semiconductor substrate 6 such as a silicon substrate. A thin gate insulator 8 is grown on or deposited ...
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