Polynorbornene foam insulation for integrated circuits

a polynorbornene foam and integrated circuit technology, applied in the direction of electrical equipment, semiconductor devices, semiconductor/solid-state device details, etc., can solve the problems of limiting the minimum feature size that is operatively achievable, and affecting the efficiency of the conductive layer
US20050029663A1Inactive Publication Date: 2005-02-10MICRON TECH INC
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Patent Information

Authority / Receiving Office
US · United States
Patent Type
Applications(United States)
Current Assignee / Owner
MICRON TECH INC
Publication Date
2005-02-10
Estimated Expiration
Not applicable · inactive patent

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Abstract

Methods of providing foamed polynorbomene insulating material for use with an integrated circuit device, as well as apparatus and systems making use of such foamed polynorbomene insulating materials. The methods include forming a layer of polynorbomene material and converting at least a portion of the layer of polynorbomene material to a foamed polynorbomene material, such as by exposing the layer of polynorbomene material to a supercritical fluid. The foamed polynorbomene material can provide electrical insulation between conductive layers of the integrated circuit device.
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Description

[0001] This application is a Divisional of U.S. application Ser. No. 09 / 507,964, filed Feb. 22, 2000 which is incorporated herein by reference.TECHNICAL FIELD

[0002] The present invention relates generally to development and fabrication of integrated circuits, and in particular to insulation techniques using polynorbomene foam as an insulating material in the development and fabrication of integrated circuits, as well as apparatus making use of such integrated circuits. BACKGROUND

[0003] To meet demands for faster processors and higher capacity memories, integrated circuit (IC) designers are focusing on decreasing the minimum feature size within integrated circuits. By minimizing the feature size within an integrated circuit, device density on an individual chip increases exponentially, as desired, enabling designers to meet the demands imposed on them. As the minimum feature size in semiconductor integrated circuits decreases, however, capacitive coupling between adjacent conductiv...

Claims

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