Forming a semiconductor structure in manufacturing a semiconductor device using one or more epitaxial growth processes

a technology of epitaxial growth and semiconductor structure, which is applied in the field of semiconductor structure formation in the manufacture of semiconductor devices, can solve the problems of unsatisfactory stress in the semiconductor structure, and achieve the effect of reducing the disadvantages and eliminating the problems of previous techniques for forming semiconductor structure in the manufacturing of semiconductor devices

Inactive Publication Date: 2005-05-19
TEXAS INSTR INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

[0005] According to the present invention, disadvantages and problems associated with previous techniques for forming semiconductor structures in manufacturing semiconductor devices may be reduced or eliminated.

Problems solved by technology

Furthermore, in certain embodiments, previous STI etch and fill techniques for forming the isolation regions may involve etching a trench for each isolation region and introducing a liner oxide layer in each of the trenches, which may lead to undesirable stress in the semiconductor structure.

Method used

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  • Forming a semiconductor structure in manufacturing a semiconductor device using one or more epitaxial growth processes
  • Forming a semiconductor structure in manufacturing a semiconductor device using one or more epitaxial growth processes
  • Forming a semiconductor structure in manufacturing a semiconductor device using one or more epitaxial growth processes

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Embodiment Construction

[0015]FIGS. 1A-1D illustrate an example process for forming a semiconductor structure 10 in manufacturing a semiconductor device, the semiconductor structure 10 formed using one or more epitaxial growth processes and having one or more isolation regions separating one or more active regions. In one embodiment, the semiconductor device includes a complementary metal oxide semiconductor (CMOS) device, such as a p-channel metal oxide semiconductor (PMOS) device or n-channel metal oxide semiconductor (NMOS) device.

[0016] As shown in FIG. 1A, an oxide layer 12 may be provided on a surface 14 of a silicon or other substrate layer 16. While surface 14 is illustrated as being substantially flat, surface 14 may have any suitable profile according to particular needs or manufacturing tolerances, for example. Oxide layer 12 may be grown on surface 14 of substrate layer 16 using any suitable technique, deposited on surface 14 of substrate layer 16 using any suitable technique, or otherwise pro...

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Abstract

In one embodiment, a semiconductor structure used in manufacturing a semiconductor device includes a substrate layer. The structure also includes first and second isolation regions formed by etching an oxide layer provided on the substrate layer to define an epitaxial growth surface of the substrate layer for epitaxial growth of a substrate material on the epitaxial growth surface between the first and second isolation regions. The structure also includes an active region that includes the epitaxially-grown substrate material between the first and second isolation regions, the active region formed by epitaxially growing the substrate material on the epitaxial growth surface of the substrate layer.

Description

TECHNICAL FIELD [0001] This invention relates generally to semiconductor structures, and more particularly to forming a semiconductor structure in manufacturing a semiconductor device using one or more epitaxial growth processes. BACKGROUND [0002] Integrated circuit fabrication often includes forming one or more isolation regions to define one or more active regions on a silicon or other substrate of a semiconductor structure. One way to form an isolation region is to form one or more trenches in the substrate using one or more etching processes while masking the substrate over what is to be the active region. As an example, this process may be referred to as shallow trench isolation (STI). Subsequent to formation, a liner oxide layer may be formed in the trenches and the trenches may be filled with a fill oxide to form the isolation regions. The etching processes for forming the isolation regions may lead to problems that may degrade transistor performance. These problems may inclu...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/8238H01L27/00
CPCH01L21/823878H01L21/823807
Inventor WASSHUBER, CHRISTOPH A.
Owner TEXAS INSTR INC
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