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Mask, method of production of same, and method of production of semiconductor device

a technology of mask and mask body, which is applied in the field of mask, method of production of same, and method of production of semiconductor devices, can solve the problems of enlargement of membrane by itself, distortion of pattern, and membrane size, and achieve the effect of high accuracy

Inactive Publication Date: 2005-06-30
SONY CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0025] Further, the present invention has as its object the provision of a method of production of a semiconductor device improving the alignment accuracy in a lithography step and able to transfer a fine pattern with a high accuracy.
[0028] Due to this, the problem of the grid lines blocking the alignment light so alignment becoming impossible when aligning the photosensitive surface and the mask by the TTR system is solved. Therefore, it becomes possible to transfer fine patterns with a high accuracy by for example LEEPL.
[0030] Due to this, it becomes possible to produce a mask in which an alignment light is not blocked by grid lines when aligning the photosensitive surface and the mask by the TTR system. According to the method of production of a mask of the present invention, it becomes possible to produce a mask able to transfer fine patterns with a high accuracy.
[0033] Due to this, it becomes possible to align the photosensitive surface and the mask by the TTR system in the lithography step. According to the present invention, the alignment light is not blocked by grid lines of the mask, so alignment can be performed with a high accuracy.

Problems solved by technology

However, the mask for LEEPL has a problem of distortion of the patterns due to internal stress when the membrane is made larger in size and the membrane flexes by its weight.
Therefore, enlargement of the membrane is limited by itself.
Therefore, the problem of the increase in deflection of the membrane along with the increase in the membrane size as observed in the mask described in Japanese Unexamined Patent Publication (Kokai) No. 2001-77016 etc. does not occur.
In the case of a stencil mask, if forming a for example donut-like pattern, the center part surrounded by the pattern cannot be supported.
However, when combining the masks arranged with the grid lines as shown in FIG. 3 with certain types of alignment methods, problems may arise.

Method used

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  • Mask, method of production of same, and method of production of semiconductor device
  • Mask, method of production of same, and method of production of semiconductor device
  • Mask, method of production of same, and method of production of semiconductor device

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Embodiment Construction

[0052] Below, embodiments of a mask and a method of production thereof and a method of production of a semiconductor device of the present invention will be described with reference to the accompanying drawings.

[0053]FIG. 7 is a top view of a mask of the present embodiment. The mask of the present embodiment is preferably used for LEEPL. As shown in FIG. 7, a stencil mask 1 is formed by using for example a silicon wafer 2 formed in its center part with a membrane 3. The stencil mask is a mask formed with holes passing through its membrane. No material exists in a space in the holes of the stencil mask.

[0054] The silicon wafer 2 at the circumference of the membrane 3 is used as a support frame reinforcing the strength of the membrane 3. The membrane 3 includes grid lines (struts) 4 integrated with the surrounding silicon wafer 2 and pattern formation regions 5 surrounded by the grid lines 4. The grid lines 4 are comprised of protruding parts formed in bar shapes or line shapes on t...

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Abstract

A mask capable of alignment by the TTR system and complementary division and having a high strength, a method of production of the same, and a method of production of a semiconductor device having a high pattern accuracy are provided. A stencil mask having stripe-shaped grid lines 4 formed by etching a silicon wafer in four sub-regions A to D on a membrane, having the stripes arranged point symmetrically about a center of the membrane, and having all of the grid lines connected to other grid lines or the silicon wafer around the membrane (support frame), a method of production of the same, and a method of production of a semiconductor device using the mask.

Description

TECHNICAL FIELD [0001] The present invention relates to a mask used for production of a semiconductor device and a method of production of the same and a method of production of a semiconductor device. BACKGROUND ART [0002] Low energy electron beam proximity projection lithography (LEEPL) is one of the next generation exposure techniques taking the place of photolithography. LEEPL uses a stencil mask having a membrane of several hundreds of nm thickness formed with holes corresponding to device patterns. A “stencil mask” means a mask formed with holes passing through its membrane. No material exists in the spaces in the holes of the stencil mask. [0003] In LEEPL, the mask is arranged just above a wafer so as to make a distance between the mask and wafer several tens of μm or so. Pattern parts of the mask are scanned by an electron beam of several tens of keV to transfer the patterns on the wafer (T. Utsumi, Journal of Vacuum Science and Technology, B17, 2897 (1999)). [0004] However,...

Claims

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Application Information

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IPC IPC(8): G03C5/00G03F1/20G03F1/68G03F9/00
CPCG03F1/20Y10S438/942H01J2237/31788G03F1/38H01L21/027H01J37/147G03F7/20
Inventor OMORI, SHINJIMORIYA, SHIGERU
Owner SONY CORP