Substrate for carrying a semiconductor chip and a manufacturing method thereof

a technology of semiconductor chips and substrates, which is applied in the direction of printed capacitor incorporation, printed electric component incorporation, electrical apparatus construction details, etc., can solve the problems of increasing the difficulty of reducing the inductance between the decoupling capacitor b>14/b> and the semiconductor chip b>12/b> mounted on the substrate b>11/b>, and the difficulty of supply of stabilized electric power, particularly the supply of stabilized voltage, to increase the difficulty rate a semiconductor chips mounted on the semiconductor chip and substrate and semiconductor chip and semiconductor chip substrate and semiconductor chip and semiconductor chip and semiconductor chip and substrate and semiconductor chip and manufacturing method which is applied in the field of semiconductor chip and manufacturing method, which is applied in the field of semiconductor chip and semiconductor chip and manufacturing method, and achieves the effect of semiconductor chip and the supply of stable electric power and the a semiconductor chip and semiconductor chip technology, applied in the field of semiconductor chip and substrate technology, which is applied in the field of semiconductor chip substrate technology, which is applied in the field of semiconductor chip and manufacturing

Inactive Publication Date: 2005-08-25
OOI KIYOSHI +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0021] According to the present invention, the capacitor is formed integrally with the laminated structure and a built-in decoupling capacitor is obtained easily and efficiently in the laminated structure.
[0022] Particularly, it becomes possible to use a high temperature process at the time of forming the decoupling capacitor by using a baked organic polysilane film for the foregoing insulation layers. It should be noted that a baked organic polysilane fi...

Problems solved by technology

With sharp increase of clock frequency in recent advanced semiconductor devices, supply of a stable electric power to semiconductor chip is becoming a paramount problem.
In other words, the semiconductor device 10 has a drawback in that reduction of the inductance between the decoupling capacitor 14 and the semiconductor chip 12 mounted on the substrate 11 is difficult.
Associated with this drawback, there arises a problem that supply of stabilized electric power, particularly the supply of stabilized voltage, to the semiconductor chip becomes difficult because of the existence of the inductance.
This problem becomes particularly serious in recent high-speed semiconductor devices in which the semiconductor chip is driven at a very high clock speed.
Because of such a construction, the conventional semicondu...

Method used

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  • Substrate for carrying a semiconductor chip and a manufacturing method thereof
  • Substrate for carrying a semiconductor chip and a manufacturing method thereof
  • Substrate for carrying a semiconductor chip and a manufacturing method thereof

Examples

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first embodiment

[0031]FIG. 1 shows the construction of a semiconductor device 20 according to a first embodiment of the present invention.

[0032] Referring to FIG. 1, the semiconductor device 20 is a so-called ball-grid type device and includes a semiconductor chip 60 flip-chip mounted on a chip-mounting surface 36 of a chip-mounting substrate 30 by way of bumps 61, wherein the semiconductor chip 60 is adhered to the chip-mounting substrate 30 by an underfill resin layer 62. Thereby, it should be noted that the bumps 61 on the bottom surface of the semiconductor chip 60 make an engagement with corresponding terminals exposed at the foregoing surface 36 including signal terminals 38 and 39, a power terminal 40, and a ground terminal 41.

[0033] As will be explained later, the chip-mounting substrate 30 is formed by a single-side build-up process and forms a multiplayer circuit substrate including lamination of insulation layers 31, 32 and 33. The substrate 30 is defined by the foregoing chip-mounting...

second embodiment

[0085]FIG. 7 shows a semiconductor device 20B according to a second embodiment of the present invention.

[0086] Referring to FIG. 7, the semiconductor device 20B has a construction similar to the semiconductor device 20 of FIG. 1 except that a chip-mounting substrate 30B is used in place of the chip-mounting substrate 30. In FIG. 7, those parts corresponding to the parts described previously are designated by the same reference numerals added with a suffix B.

[0087] As will be explained later, the chip-mounting substrate 30B is a multilayer circuit substrate formed by a both-side buildup method and thus includes, in addition to the insulation layers 33, 32 and 31 built up in the A1 direction, insulation layers 140 and 141 that are built up in the A2 direction. The chip-mounting substrate 30B has a chip-mounting surface 36B at the top side thereof and a mounting surface 37 at the bottom surface thereof.

[0088] Similarly as before, the decoupling capacitor 50 is formed between the ins...

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Abstract

A substrate includes a plurality of insulation layers forming a laminated structure and a built-in capacitor formed in the laminated structure, wherein the laminated structure includes a layer of baked organic polysilane.

Description

CROSS-REFERENCE TO RELATED APPLICATION [0001] The present application is based on Japanese priority application No. 2002-314695 filed on Oct. 29, 2002, the entire contents of which are hereby incorporated by reference. BACKGROUND OF THE INVENTION [0002] The present invention generally relates to semiconductor devices and more particularly to a substrate for carrying a semiconductor chip and a manufacturing method thereof. Further, the present invention is related to a semiconductor device that uses such a substrate. [0003] With sharp increase of clock frequency in recent advanced semiconductor devices, supply of a stable electric power to semiconductor chip is becoming a paramount problem. In order to deal with this problem, there is a proposal to provide a capacitor on a substrate on which the semiconductor chip is mounted. [0004]FIG. 9 shows a conventional semiconductor device 10. [0005] Referring to FIG. 9, the semiconductor device 10 includes a substrate 11 mounted with a semico...

Claims

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Application Information

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IPC IPC(8): H05K3/46H01L21/56H01L21/68H01L23/12H01L23/498H05K1/16
CPCH01L21/563H01L21/6835H01L2924/15311H01L2224/73204H01L2224/32225H01L2224/16225H05K2201/09763H05K1/162H01L2924/30105H01L2924/19041H01L23/49816H01L23/49822H01L23/49894H01L2221/68345H01L2221/68359H01L2924/12044H01L2924/00H01L2224/05573H01L2224/05568H01L2924/00014H01L2224/05599
Inventor OOI, KIYOSHIHORIKAWA, YASUYOSHI
Owner OOI KIYOSHI
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