Logic and memory device integration

Abstract

Memory devices are adapted for direct interface or virtual integration with a processor or other logic device through a local bus and isolated from a system bus. Such memory devices are capable of lower power requirements and reduced size due in part to the elimination of certain redundant circuitry. Direct interfacing through the local bus facilitates the elimination or reduction of input / output (I / O) buffer circuitry by eliminating the need to step up to and step down from typical system bus voltage levels. Communication between the memory device and a separate logic device occurs across the local bus at voltage levels compatible with internal logic levels of the memory device.

Description

RELATED APPLICATIONS [0001] This application is a Continuation of U.S. application Ser. No. 09 / 940,259, filed Aug. 27, 2001, titled “LOGIC AND MEMORY DEVICE INTEGRATION” (allowed), which claims priority to Italian Patent Application Serial No. RM2000A000671, filed Dec. 15, 2000, titled “LOGIC AND MEMORY DEVICE INTEGRATION,” now Italian Patent No. 01316025, issued Mar. 26, 2003, which are commonly assigned and incorporated herein by reference.TECHNICAL FIELD OF THE INVENTION [0002] The present invention relates generally to semiconductor memory devices, and in particular, the present invention relates to semiconductor memory devices designed for integration with a processor or other logic device and systems produced therefrom. BACKGROUND OF THE INVENTION [0003] Electronic information handling or computerized systems, whether large machines, microcomputers or small handheld devices, require memory for storing data and program instructions. Various memory systems have been developed ov...

AI Technical Summary

Benefits of technology

The present invention relates to semiconductor memory devices and their integration with logic devices. The technical effects of this invention include providing flexibility in the integration of logic and memory devices, reducing the size and power requirements of the memory devices, and simplifying the process of integrating new technologies into the system. The invention also includes a method for integrating a memory device and logic device in a single-chip ASIC chip, which reduces the required semiconductor real estate and simplifies the process of responding to changing markets or new technology.

Problems solved by technology

Specialized portable devices are consuming large quantities of flash memory and are continually pushing for lower voltages and higher densities to decrease power requirements, reduce size and increase functionality.

Such an approach is a low-cost alternative, but memory processes lack the metal layers and circuit complexity necessary to produce a high-performance logic device.

Thus, such an ASIC provides relatively limited performance of the logic core.

While more expensive than the first approach, the logic process supports high-performance logic cores.

In either of these approaches, the flexibility of the ASIC is limited as the functionality of the logic core and the size of the memory device are fixed.

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