Driving circuit for switching elements

a technology of driving circuit and switching element, which is applied in the direction of electronic switching, electrical equipment, pulse technique, etc., can solve the problem of limit the capacity to prevent erroneous operation, and achieve the effect of improving the tolerance level of dv/dt transients and ensuring reliability

Inactive Publication Date: 2007-01-04
HITACHI LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0022] According to the present invention, it becomes possible to attain making a l...

Problems solved by technology

However, in the case of low dV/dt transient characteristics, i.e., when the transient time is greater than the tim...

Method used

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  • Driving circuit for switching elements
  • Driving circuit for switching elements
  • Driving circuit for switching elements

Examples

Experimental program
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Effect test

embodiment 1

[0033]FIG. 1 is a block diagram showing the drive circuit of driver IC 30, a semiconductor device for driving a semiconductor power switching device being the embodiment. An IGBT (Insulated Gate Bipolar Transistor) 24, being the semiconductor power switching device (hereinafter abbreviated as “switching device”) of an upper side 232, and an IGBT 25, being the switching device of a lower side 233, are connected in totem-pole to both terminals of a main power supply 23 and constitute a half bridge. The cathode side of main power supply 23 is connected to ground.

[0034] Freewheel diodes 26, 27 are connected in anti-parallel to IGBT 24 and IGBT 25. And, a load 28 (an inductive load like a motor) is connected to a connection point 251 of IGBT 24 and IGBT 25.

[0035] IGBT 24 of upper side 232 is a device performing switching operation, taking as reference potential the potential of the point 251 of contact with IGBT 25 of lower side 233, and an upper side regulating power supply 21 insulat...

embodiment 2

[0051]FIG. 3 is block diagram showing the present embodiment 2. To constituent elements identical to those of FIG. 1, identical symbols are attached. The present embodiment has the configuration of Embodiment 1, but with integrating circuits 13, 14 removed.

[0052] The differential voltage, during normal operation, is outputted with a value corresponding to the pulse width. Because of this, it is determined to be at a regular level and is outputted as a normal signal, and is inputted as a signal to the set input and the reset input of flip-flop circuit 38.

[0053] Moreover, in case a dV / dt transient signal is generated, since the difference of the simultaneously flowing currents is obtained in set differential amplifier circuit 11 and reset differential amplifier circuit 12, the outputs of the differential amplifier circuits almost reach zero. Consequently, in these circuits, since differential voltages are obtained, the outputs of the differential amplifier circuits almost reach zero...

embodiment 3

[0055]FIG. 5 is a block diagram showing the circuits of the present embodiment. Elements identical to those in Embodiment 1 have the same symbols attached. The present embodiment has the configuration of Embodiment 2, but with differential amplifier circuits 11, 12 removed, and the voltages of level shifting resistances 34, 35 are supplied directly to comparator circuits 15, 16.

[0056] With comparator circuits 15, 16, it is possible to set a low level for the variation in reference potential, and, by taking advantage of the delay time of comparator circuits 15, 16, the integrated value of the regular signal and the integrated value of the dV / dt noise signal are calculated in advance. When the comparison voltages of comparator circuits 15, 16 are set appropriately, simultaneous inputting of signals in the set input and the reset input of flip-flop circuit 38 is eliminated, even in the present configuration. Because of this, it becomes possible to prevent generating unpredictable oper...

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PUM

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Abstract

A level shifting circuit, satisfying a requirement of a high tolerated dV/dt level, and a highly reliable inverter circuit, wherein a set pulse signal and a reset pulse signal, both of which are level-shifted to a potential side taking as reference a reference potential of a gate control terminal of a switching terminal, are obtained differentially and integrated, and, in case these pulse signals equal or exceed stipulated integrated values, are transmitted as regular control signals controlling the on/off state.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention pertains to a drive circuit for semiconductor power switching elements. [0003] 2. Description of the Related Art [0004] Inverter devices are well known wherein a first switching element and a second switching element are respectively placed on a low voltage side arm (below called the “lower side”) and a high voltage side arm (below called the “upper side”), the two arms being connected between the terminals of a main power supply, and the first and the second switching elements are connected in totem-pole connected in series. [0005] In a device such as this, the second switching element connected to the upper side is driven in a floating state in terms of potential, with respect to the reference potential, for which drive circuit a power supply externally insulated by means of a transformer is used. Also, in order to transmit drive signals from the low voltage side circuit to the high voltage s...

Claims

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Application Information

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IPC IPC(8): H03K17/56
CPCH03K17/567
Inventor ISHIKAWA, KATSUMIMIYAZAKI, HIDEKISUDA, KOICHISUZUKI, KATSUNORI
Owner HITACHI LTD
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