Selective electroless-plated copper metallization

a technology of electroless plated copper and selective metallization, which is applied in the direction of semiconductor devices, semiconductor/solid-state device details, electrical equipment, etc., can solve the problems of increasing the number of process steps involved in the fabrication of integrated circuits, wasting and expensive processes, and affecting the quality of the finished produ
US20070085213A1Inactive Publication Date: 2007-04-19MICRON TECH INC
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Patent Information

Authority / Receiving Office
US · United States
Patent Type
Applications(United States)
Current Assignee / Owner
MICRON TECH INC
Publication Date
2007-04-19
Estimated Expiration
Not applicable · inactive patent

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Abstract

Structures and methods are provided which include a selective electroless copper metallization. The present invention includes a novel methodology for forming copper vias on a substrate, including depositing a thin film seed layer of Palladium (Pd) or Copper (Cu) on a substrate to a thickness of less than 15 nanometers (nm). A number of via holes is defined above the seed layer. A layer of copper is deposited over the seed layer using electroless plating to fill the via holes to a top surface of the patterned photoresist layer. The method can be repeated any number of times, forming second, third and fourth layers of copper. The photoresist layers along with the seed layers in other regions can then be removed, such as by oxygen plasma etching, such that a chemical mechanical planarization process is avoided.
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Description

RELATED APPLICATIONS

[0001] This application is a Continuation of U.S. application Ser. No. 10 / 929,251, filed Aug. 30, 2004, which is a Divisional of U.S. application Ser. No. 09 / 483,881, filed Jan. 18, 2000, both of which are incorporated herein by reference.

[0002] This application is related to the following co-filed and commonly assigned applications; U.S. application Ser. No. 09 / 488,098, filed Jan. 18, 2000, now U.S. Pat. No. 6,429,120 and U.S. application Ser. No. 09 / 484,303, filed Jan. 18, 2000, both of which are hereby incorporated by reference.FIELD OF THE INVENTION

[0003] The present invention relates generally to integrated circuits. More particularly, it pertains to structures and methods for selective electroless-plated copper metallization. BACKGROUND OF THE INVENTION

[0004] The rapid progress in miniaturization of integrated circuits (IC) is leading to denser and finer pitched chips with ever increasing performance. In order to enhance the performance of advanced ICs,...

Claims

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