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Method for fabricating semiconductor device using hard mask

Inactive Publication Date: 2007-08-30
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0006]Embodiments of the present invention are directed to provide a method for fabricating a semiconductor device suitable for i

Problems solved by technology

However, hydrogen components existing inside a nitride layer for the hard mask or an inter-layer insulation layer may not be diffused out during forming the polysilicon layer for the storage node contact, but diffused to a silicon substrate.
However, a top portion of the hard mask may be damaged due to a degradation of a self-aligned contact etch property of the storage node contact.

Method used

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  • Method for fabricating semiconductor device using hard mask
  • Method for fabricating semiconductor device using hard mask
  • Method for fabricating semiconductor device using hard mask

Examples

Experimental program
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Embodiment Construction

[0011]FIGS. 1A to 1C illustrate a method for fabricating a storage node contact hole of a semiconductor device in accordance with an embodiment of the present invention. As shown in FIG. 1A, a first insulation layer 12 is formed over an upper portion of a substrate 11 and then, a plurality of contact holes penetrating the first insulation layer 12 are formed. A plurality of landing plugs 13 filling the contact holes are formed between word lines (not shown). The landing plugs 13 include polysilicon.

[0012]A second insulation layer 14 is formed over the landing plugs 13 and the first insulation layer 12. Afterwards, a plurality of bit lines BL, each formed stacking a bit line tungsten layer 15 and a bit line hard mask 16, are formed over certain portions of the second insulation layer 14. A barrier metal layer can be formed beneath the bit line tungsten layer 15. The barrier metal layer includes a stack structure of titanium (Ti) and titanium nitride (TiN). The bit line hard mask 16 i...

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Abstract

A method for fabricating a semiconductor device includes forming a layer to be etched, forming a hard mask pattern over the layer, and etching the layer to form a pattern. The hard mask pattern has an atomic percentage of a silicon-hydrogen bond varying with a thickness of the hard mask pattern.

Description

CROSS-REFERENCES TO RELATED APPLICATIONS[0001]The present invention claims priority of Korean patent application numbers 10-2006-0018805 and 10-2006-0120793, filed on Feb. 27, 2006 and Dec. 1, 2006, respectively, which are incorporated by reference in their entirety.BACKGROUND OF THE INVENTION[0002]The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a method for fabricating a semiconductor device using a hard mask.[0003]A polysilicon layer has been used as a hard mask due to lack of a photoresist margin to define a storage node contact hole during fabricating a dynamic random access memory (DRAM) device with a size of about 9 nm. However, the polysilicon layer induces a mask alignment during forming a subsequent storage node contact. Thus, after performing an additional process opening a storage node contact key box and defining the storage node contact hole, a process to remove the polysilicon layer used as the hard mask is ad...

Claims

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Application Information

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IPC IPC(8): H01L21/31H01L21/469
CPCH01L21/31144H01L21/76897H01L21/3185H01L21/3145H01L21/02211H01L21/02129H01L21/0217
Inventor NAM, KI-WONHAN, KY-HYUN
Owner SK HYNIX INC
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