Modulation methods and apparatus for reducing common mode noise

Abstract

A method and apparatus for reducing common mode noise in a three phase pulse width modulated (PWM) system the method comprising the steps of receiving modulating waveforms, identifying a first of the modulating waveforms that is instantaneously the maximum of the modulating waveforms, identifying a second of the modulating waveforms that is instantaneously the minimum of the modulating waveforms, for a first phase associated with at least one of the first and second identified waveforms, substituting a first substitute waveform for the one of the first and second waveforms, for the first phase, modifying at least one of the first substituted waveform and duty cycle signals generated by comparing the first substituted waveform with the carrier signal as a function of a first rule set to substantially minimize the effects of turn on delays and for at least one of the second and third phases, modifying at least one of the associated modulating waveform and duty cycle signals generated by comparing the modulating waveform with the carrier signal as a function of a second rule set to substantially eliminate the effects of turn on delays where the second rule set is different than the first rule set.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]Not applicable.STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT[0002]Not applicable.BACKGROUND OF THE INVENTION[0003]The present invention relates generally to methodologies for reducing the common mode noises generated by two-level rectifier / inverter variable frequency drive (VFD) systems. This invention more particularly relates to modulation techniques for common mode noise reduction.[0004]Referring to FIG. 1, an exemplary two-level rectifier / inverter variable frequency drive (VFD) system is shown that includes a three phase voltage source, a rectifier, a three phase inverter and a load (e.g., a motor). The rectifier may be either a diode type (i.e., constructed using diodes) or an active type (i.e., a boost type including controllable switching devices that is controlled via pulse width modulation (PWM) or the like). Where the rectifier is active, the rectifier typically includes six switching devices (e.g., solid state...

AI Technical Summary

Benefits of technology

The patent text describes a method for reducing common mode noise in a three phase PWM system. The method involves identifying the highest and lowest modulating waveforms for each phase, and then modifying these waveforms to minimize the effects of turn on delays and current polarity. The modified waveforms are then used to generate control signals for the converter and inverter switches. The technical effect of this method is to improve the performance and stability of the three phase PWM system by reducing common mode noise.

Problems solved by technology

CMV pulses cause CMV dv / dts which in turn cause common mode current (CMC) spikes.

CMV and associated CMC have been known to reach levels beyond motor winding insulation ratings and can result in undesirable bearing currents.

Consequently, CMV and CMC often reduce system performance at a minimum and have been known to damage motor components.

Unfortunately synchronization of the switching sequences is not easy to facilitate when the switching frequency of the boost rectifier is different than the frequency of the inverter.

Unfortunately, this vector shifting SVPWM control scheme cannot be applied to diode rectifier / inverter systems.

Calculating dwell times in real time requires excessive dedicated computing power.

Images