Synchronisation and trigger distribution across instrumentation networks

Abstract

A system for synchronising the operation of a measurement instrument having a microcontroller, a local oscillator and function circuitry to an external timebase is provided. The system includes a USB Host Controller; an interrupt generator adapted to respond to ITPs by generating respective interrupts and passing the interrupts to the microcontroller; and a timer for measuring an interval between receptions of the ITPs in a time domain of the local oscillator.

Description

RELATED APPLICATION[0001]This application is based on and claims the benefit of the filing date of U.S. application No. 61 / 179,904 filed 20 May 2009, the content of which as filed is incorporated herein by reference in its entirety.FIELD OF THE INVENTION[0002]The present invention relates to a method and apparatus for providing a synchronization and timing system, with connectivity based on revision three of the Universal Serial Bus (USB) architecture (or USB 3.0), of particular but by no means exclusive use in providing clocks, data acquisition and automation and control of test and measurement equipment, instrumentation interfaces and process control equipment, synchronized to an essentially arbitrary degree in either a local environment or in a distributed scheme.BACKGROUND OF THE INVENTION[0003]The USB specification up to and including revision 2.0 was intended to facilitate the interoperation of devices from different vendors in an open architecture. USB 2.0 data is encoded usi...

AI Technical Summary

Benefits of technology

This approach allows for precise synchronization of USB devices, reducing latency and improving accuracy in timing-sensitive applications by ensuring all devices are actively connected and aligned with the USB Host Controller's timestamped packets, overcoming the limitations of USB 3.0's architecture.

Problems solved by technology

However, USB was user focussed so the USB 2.0 specification lacked a mechanism for synchronising devices to any great precision.

This provides a degree of synchronization sufficient to read smart card information into a host PC but, as this approach is directed to a smart card reader, inter-device synchronization is not addressed.

All of the above systems work within the bounds of conventional USB 2.0 and as such are limited in several areas.

USB 2.0 is limited in range by the device response timeout.

In particular, the background art synchronisation schemes discussed above will not work with the new 5 Gb / s protocol (termed ‘SuperSpeed USB’) because it does away with the broadcast mechanism for SOF packets.

Very high speed communication systems consume large amounts of power owing to high bit rates.

This significantly affects any extension of the synchronisation schemes of, for example, U.S. patent application Ser. No. 12 / 279,328, whose method and apparatus for synchronising devices is based on a broadcast clock carrier signal that is delivered to each device on the bus, which is unsuitable in SuperSpeed USB.

A heavily burdened Hub function can therefore add significant non-deterministic delays in packet transmission through the system.

Unfortunately the Isochronous Timestamp packet can be delayed in propagation down the USB network.

USB 3.0 also does not provide a way of determining the propagation time of packets in SuperSpeed USB and hence no way of accurately knowing the phase relationship between time domains on different USB devices.

Phase differences of several hundred nanoseconds are expected to be a best case scenario with SuperSpeed USB making it impractical for instrumentation or other precision timing requirements.

This continual messaging consumes bandwidth and limits the accuracy of the possible synchronisation to several hundred nano-seconds in a point-to-point arrangement and substantially lower accuracy (typically micro-seconds) in a conventional switched subnet.

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