High resistivity silicon-on-insulator substrate and method of forming

Active Publication Date: 2013-07-04
GLOBALFOUNDRIES US INC
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  • Application Information

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Benefits of technology

[0003]A semiconductor structure and a method of forming the same are disclosed. In one embodiment, a method of forming a silicon-on-insulator (SOI) wafer substrate is disclosed, the method including: providing a handle substrate; forming a high resistivity material layer over the handle substrate, the high resistivity material layer including one of an amorphous silicon carbide (SiC), a polycrystalline SiC, an amorphous carbon, an amorphous diamond, or a polycrystalline diamond; forming an insulator layer over the high resistivity material layer; and bonding a donor wafer to a top surface of the insulator layer to form the SOI wafer substrate.
[0004]A first aspect includes a method of forming a silicon-on-insulator (SOI) wafer substrate, the method including: providing a handle substrate; forming a high resistivity material layer over the handle substrate, the high resistivity material layer including one of an amorphous silicon carbide (SiC), a polycrystalline SiC, an amorphous carbon, an amorphous diamond, or a polycrystalline diamond; forming an insulator layer over the high resistivity material layer; and bonding a donor waf

Problems solved by technology

In these SOI RF devices, free carriers in the handle substrate are susceptible to movement caused by the electric fields created by potentials on the transistors and wires.
The movement of carriers is generally non-linear, and

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[0014]It is noted that the drawings of the invention are not necessarily to scale. The drawings are intended to depict only typical aspects of the invention, and therefore should not be considered as limiting the scope of the invention. In the drawings, like numbering represents like elements between the drawings.

DETAILED DESCRIPTION

[0015]As noted herein, the subject matter disclosed relates to a silicon-on-insulator based integrated circuit structure. More specifically, the subject matter disclosed herein relates to an integrated circuit structure having a silicon-on-insulator substrate with a high resistivity.

[0016]In certain semiconductor devices, such as semiconductor-on-insulator (SOI) radio frequency (RF) devices, resistivity in the handle substrate can impact performance of the device. An example of such a device is a SOI RF complementary metal oxide semiconductor (CMOS) device. In these SOI RF devices, electric potentials on transistors and wires create electric fields, whic...

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Abstract

A semiconductor structure and a method of forming the same. In one embodiment, a method of forming a silicon-on-insulator (SOI) wafer substrate includes: providing a handle substrate; forming a high resistivity material layer over the handle substrate, the high resistivity material layer including one of an amorphous silicon carbide (SiC), a polycrystalline SiC, an amorphous diamond, or a polycrystalline diamond; forming an insulator layer over the high resistivity material layer; and bonding a donor wafer to a top surface of the insulator layer to form the SOI wafer substrate.

Description

FIELD OF THE INVENTION[0001]The subject matter disclosed herein relates to a silicon-on-insulator based semiconductor structure. More specifically, the subject matter disclosed herein relates to a semiconductor structure having a silicon-on-insulator substrate with a high resistivity.BACKGROUND[0002]In certain semiconductor devices, such as semiconductor-on-insulator (SOI) radio frequency (RF) devices, resistivity in the handle substrate can impact performance of the device. An example of such a device is a SOI RF complementary metal oxide semiconductor (CMOS) device. In these SOI RF devices, free carriers in the handle substrate are susceptible to movement caused by the electric fields created by potentials on the transistors and wires. The movement of carriers is generally non-linear, and this non-linear “drag” both lowers the charge (Q) of passive components and creates nonlinearities in electrical characteristics. The handle substrate also functions as a path for heat removal fr...

Claims

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Application Information

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IPC IPC(8): H01L23/58H01L21/762
CPCH01L29/16H01L21/76254H01L21/02002
Inventor BOTULA, ALAN B.JAFFE, MARK D.JOSEPH, ALVIN J.
Owner GLOBALFOUNDRIES US INC
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