Semiconductor integrated device including capacitor and memory cell and method of forming the same
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[0014]To provide a better understanding of the present invention, preferred embodiments will be described in detail. The preferred embodiments of the present invention are illustrated in the accompanying drawings with numbered elements.
[0015]Please refer to FIG. 1 to FIG. 7, which are schematic diagrams illustrating the method of forming a semiconductor integrated device according to a first embodiment of the present invention. Firstly, a substrate 100 is provided. The substrate 100 can be a silicon substrate, an epitaxial silicon substrate, a silicon germanium substrate, a silicon carbide substrate or a silicon-on-insulator (SOI) substrate, but is not limited thereto. A memory cell region 200 is defined on the substrate 100 to form a memory cell device in the following steps, and a capacitor region 300 is defined on the substrate 100 to form a capacitor in the following steps, as shown in FIG. 1.
[0016]Next, a least one shallow trench isolation (STI) is formed in the substrate 100. ...
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