Method, Digital Electronic Circuit and System for Unsupervised Detection of Repeating Patterns in a Series of Events

Abstract

A method of performing unsupervised detection of repeating patterns in a series (TS) of events (E21, E12, E5 . . . ), comprising the steps of: a) Providing a plurality of neurons (NRI-NRP), each neuron being representative of W event types; b) Acquiring an input packet (IV) comprising N successive events of the series; c) Attributing to at least some neurons a potential value (PTI-PTP), representative of the number of common events between the input packet and the neuron; d) Modify the event types of neurons having a potential value exceeding a first threshold TL; and e) generating a first output signal (OSI-OSP) for all neurons having a potential value exceeding a second threshold TF, and a second output signal, different from the first one, for all other neurons. A digital electronic circuit and system configured for carrying out such a method.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is a continuation of PCT Application No. PCT / EP2017 / 079767 filed on Nov. 20, 2017, which in turn claims priority to European Application No. EP17305186.3 filed Feb. 20, 2017 and European Application No. EP16306525.3 filed Nov. 21, 2016, all of which are incorporated herein by reference in their entirety.DESCRIPTIONObject of the Invention[0002]The invention relates to a method, a digital circuit, a system and a computer program product for performing unsupervised detection of repeating patterns in a series of events. It belongs to the technical fields of digital electronics and of machine learning and more particularly to the sub-field of neural networks. It lends itself to several applications including—but not limited to—video stream processing (e.g. Dynamic Vision Sensors) and audio processing (e.g. artificial cochleae).PRIOR ART[0003]One of the most striking features of the cerebral cortex is its ability to wire itself...

AI Technical Summary

Benefits of technology

[0013]The invention aims at overcoming these drawbacks of the prior art by providing a method and an architecture for performing unsupervised detection of temporal patterns which is simple and economical to implement (in terms of computing time, energy consumption and / or silicon surface), effective and robust.

[0015]Input events (“spikes”) are grouped into fixed-size packets. The temporal order between events of a same packet is lost, which may seem a drawback, but indeed increases robustness as it eases the detection of distorted patterns and makes the method insensitive to changes of the event rate.

[0016]Weighted or un-weighted synapses are replaced by set of binary weights. Learning only requires flipping some of these binary weights and performing sums and comparisons, thus minimizing the computational burden.

[0017]The number of binary weights which is set to “1” for each neuron does not vary during the learning process. This avoids ending up with non-selective or non-sensible neurons.

[0019]According to an aspect of the invention, these drawbacks of the prior art are overcome by providing a digital hardware implementation of a spiking network which is simple and economical in terms of computing time, energy consumption and / or silicon surface, while being very effective for performing robust unsupervised detection of repeating patterns.DESCRIPTION OF THE INVENTION

[0027]In a preferred embodiment, nswap and TL are set independently for different neurons. More preferred, nswap and TL are respectively decreased and increased as the potential value of the neuron increases.

Problems solved by technology

It has been shown that artificial neurons equipped with this mechanism can detect repeating patterns of input “spikes”, in an unsupervised manner, even when those patterns are embedded in noise.

Operating such an artificial neural network is computationally intensive, as updating the synapses weights (essential for learning) requires multiply—accumulate operations, and multiplications are known to be the most space and power-hungry operations in the digital implementation of artificial neural networks.

Despite this simplification, operating this artificial neural network remains computationally intensive, as it requires measuring and applying variable delays to input and output spikes.

Moreover, artificial neural networks according to the prior art generally suffer from a lack of robustness: they may fail to detect a pattern it if is slightly distorted, or if the event acquisition rates varies.

This also adversely affects robustness.

If too low, the weights tend to decrease until the neurons do not reach their threshold anymore, which is a dead end.

The temporal order between events of a same packet is lost, which may seem a drawback, but indeed increases robustness as it eases the detection of distorted patterns and makes the method insensitive to changes of the event rate.Weighted or un-weighted synapses are replaced by set of binary weights.

These hardware implementations, however, are often complex, requiring a large silicon surface, and therefore expensive.

In some cases, analog or mixed-signal implementations using special devices such as memristors are used, but this approach is also complex and expensive.

Images