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Analog-to-digital converter device

a digital converter and analog technology, applied in the direction of code conversion, physical parameter compensation/prevention, electrical apparatus, etc., can solve the problem that the performance of the adc is affected by non-ideal factors, and achieve the effect of improving the overall performance of the adc devi

Active Publication Date: 2020-07-16
REALTEK SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present patent introduces a new architecture for analog-to-Digital Converters (ADCs) that have a noise-shaping function and time-interleved conversion. This results in improved performance of the overall ADC device.

Problems solved by technology

However, in practical applications, performance of the ADC is affected by non-ideal factors, such as process variations, quantization noise, thermal noise, and so on.

Method used

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  • Analog-to-digital converter device
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Embodiment Construction

[0018]In this document, the term “circuitry” may indicate a system formed with one or more circuits. The term “circuit” may indicate an object, which is formed with one or more transistors and / or one or more active / passive elements based on a specific arrangement, for processing signals.

[0019]For ease of understanding, like elements in each figure are designated with the same reference number.

[0020]FIG. 1 is a schematic diagram of an analog-to-digital converter (ADC) device 100 according to some embodiments of the present disclosure. In some embodiments, the ADC device 100 operates as a time interleaved successive approximation register (SAR) ADC.

[0021]The ADC device 100 includes switches S1 and S2, capacitor arrays CT1 and CT2, noise shaping circuitries 120 and 122, SAR circuitries 140 and 142, and a data combination circuitry 160. The switches S1 and S2 are conducted (e.g., closed) according to enabling levels of clock signals ϕs1 and ϕs2 respectively. The switches S1 and S2 are c...

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Abstract

An analog-to-digital converter (ADC) device includes capacitor arrays, successive approximation register (SAR) circuitries, and noise shaping circuitries. The capacitor arrays sample an input signal by turns, in order to provide a sampled input signal. The SAR circuitries perform an analog-to-digital conversion by turns according to a combination of the sampled input signal, a first residue signal, and a second residue signal, in order to generate digital outputs. The noise shaping circuitries receive a corresponding residue signal of the first residue signal the second residue signal in response to the analog-to-digital conversion, and to shape and transmit the corresponding residue signal to the SAR circuitries.

Description

RELATED APPLICATIONS[0001]This application claims priority to U.S. Provisional Application Ser. No. 62 / 791,128, filed Jan. 11, 2019, U.S. Provisional Application Ser. No. 62 / 806,026, filed Feb. 15, 2019, and U.S. Provisional Application Ser. No. 62 / 826,164, filed Mar. 29, 2019 all of which are herein incorporated by reference in their entireties.BACKGROUNDTechnical Field[0002]The present disclosure relates to an analog-to-digital converter (ADC) device. More particularly, the present disclosure relates to a time interleaved successive approximation register ADC having a noise shaping function.Description of Related Art[0003]An analog-to-digital converter (ADC) has been widely applied to various electronic devices, in order to covert an analog signal to a digital signal for subsequent signal processing. As the need of processing data with high resolution (for example, video data) rises, the ADC is often the key component in the system. However, in practical applications, performance ...

Claims

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Application Information

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IPC IPC(8): H03M1/08
CPCH03M1/0854H03M1/129H03M3/426H03M1/468
Inventor HUANG, SHIH-HSIUNG
Owner REALTEK SEMICON CORP