Semiconductor integrated circuit device and method of manufacturing the same

Abstract

An EEPROM (Electrically Erasable Programmable Read Only Memory) has a structure in which the corners of a floating gate electrode of each memory cell MISFET near the source region thereof are rounded.The EEPROM is manufactured by a method characterized in that the ions of an impurity at a high dose are implanted in self-alignment with the floating gate electrode and control gate electrode of the memory cell MISFET so as to form the source and drain regions thereof, whereupon an oxidizing treatment is carried out.

Description

BACKGROUND OF THE INVENTIONThe present invention relates to a semiconductor integrated circuit device, and a method of manufacturing the same. More particularly, it relates to techniques which are effective when applied to a semiconductor integrated circuit device having a nonvolatile memory.A nonvolatile memory cell of the one-element type has been proposed as the nonvolatile memory cell of an EEPROM (Electrically Erasable Programmable Read Only Memory). This nonvolatile memory cell is constructed of a field-effect transistor (MISFET) which has a floating gate electrode (information storing gate electrode) and a control gate electrode (controlling gate electrode). The source region of the MISFET is connected to a source line, and the drain region to a data line.The nonvolatile memory cell is called a "flash type nonvolatile memory cell", in which information is written with hot electrons and is erased by tunneling. More specifically, the information writing operation of the nonvola...

AI Technical Summary

Benefits of technology

The erasing characteristics depend greatly upon the shape of the floating gate electrode, especially the shape of the ends of this gate electrode. An electric field which is applied between the floating gate electrode and the source region in the erasing operation is as high as 10.sup.8 [V / m] or above. Nevertheless, the electric field does not exhibit a uniform intensity distribution, but it tends to concentrate distortionally on the ends of the gate electrode, particularly the corners thereof, due to a so-called edge effect. Consequently, a slight dispersion in the shapes of the floating gate electrodes brings the erasing characteristics a wide dispersion.

Moreover, when the applied electric field in the erasing operation concentrates partially on any specific portion, the breakdown or degradation of an insulator film is liable to occur in the specific portion. This decreases the number of times which an erasing voltage is applied, namely, the number of times which the memory cell is repeatedly rewritten.

An object of the present invention is to provide techniques that narrow the dispersion of erasing characteristics among memory cells and increase the number of times which each cell can be repeatedly rewritten, thereby to realize a nonvolatile memory of high reliability.

Problems solved by technology

The dispersion of erasing characteristics is wide among the memory cells, and the number of times which each cell can be repeatedly rewritten is comparatively small, so that the reliability of the EEPROM is somewhat inferior.

Nevertheless, the electric field does not exhibit a uniform intensity distribution, but it tends to concentrate distortionally on the ends of the gate electrode, particularly the corners thereof, due to a so-called edge effect.

Moreover, when the applied electric field in the erasing operation concentrates partially on any specific portion, the breakdown or degradation of an insulator film is liable to occur in the specific portion.

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