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Method for reducing injecting hot carrier of I/O NMOS device

A hot carrier and device technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., to achieve the effect of enhancing the diffusion of LDD phosphorus impurities and improving HCI

Active Publication Date: 2008-05-14
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, it is not enough to improve HCI simply by changing the dose and energy of LDD ion implantation

Method used

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  • Method for reducing injecting hot carrier of I/O NMOS device
  • Method for reducing injecting hot carrier of I/O NMOS device
  • Method for reducing injecting hot carrier of I/O NMOS device

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Embodiment Construction

[0012] The basic idea of ​​improving I / O NMOS HCI is to make the LDD junction more gradual, reduce the lateral electric field of the channel, and keep the maximum value of the electric field away from the surface of the channel while ensuring that the normal characteristics of the transistor remain unchanged.

[0013] Conventional method (its process flow chart is as figure 1 Shown) is to increase the energy of LDD ion implantation and reduce the dose, but it may bring serious short channel effect.

[0014] Such as figure 2 As shown, the method for reducing I / O NMOS device hot carrier injection of the present invention is to adopt low-dose arsenic ion implantation plus phosphorus ion implantation in LDD to replace the conventional single phosphorus ion implantation method, and in LDD After the phosphorus ion implantation is adopted, the conventional LDD rapid thermal annealing process is canceled, so that the phosphorus atoms in the LDD can enhance the diffusion with the hel...

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Abstract

The invention discloses a method for reducing hot carriers injection of I / O NMOS devices, in an LDD, adopting low-dosage As injection and P injection to replace the routine single P injection and after adopting P ion injection, canceling the routine LDD fast thermal annealing process to make the P atom diffusion in the LDD reinforced with the help of point defect so as to increase concentration gradation of the junction, thus improving the HCI. The invention can overcome short channel effect and deviation of transistor characteristics caused by singly depending LDD injection energy in the routine process, applied to the manufacturing process of I / O NMOS devices.

Description

technical field [0001] The present invention relates to a manufacturing process method of semiconductor devices, in particular to a method of using double lightly doped drain (LDD) ion implantation and changing its annealing to reduce hot carrier injection of I / O (input / output) NMOS devices (HCI) method. Background technique [0002] The reliability of semiconductor devices is an important part of the reliability of semiconductor processes, and hot carrier injection is the main test item for the reliability of I / O NMOS devices. During semiconductor process development, I / O NMOS usually requires a special design in order to pass HCI testing. [0003] HCI is due to the presence of a strong lateral electric field in the device channel, which causes the impact ionization of the carriers during the transport process, generating additional electron-hole pairs, and part of the hot carriers are injected into the gate oxide layer, thus affecting the device characteristics. . It is...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/265
Inventor 钱文生
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP