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Manufacturing method of metal layer direct pattern of semiconductor element

A manufacturing method and patterning technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc.

Inactive Publication Date: 2007-07-18
台湾薄膜电晶体液晶显示器产业协会 +7
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  • Claims
  • Application Information

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Problems solved by technology

Among the above-mentioned known technologies such as vacuum thin film deposition technology, yellow light and photolithography technology used in the manufacturing process of semiconductor elements, if the demand for large-size panels increases day by day, due to the increase in deposition substrates, equipment costs and material consumption will gradually become transistor arrays. The heavy burden of manufacturing, however, in order to solve the technical bottleneck of this technology applied to large-size panels, there are more known technologies to propose a way to replace this traditional process
[0003] As disclosed in US Patent No. 6,329,226, the method for fabricating a thin film transistor, which describes a method for patterning the metal layer of a transistor, is key in using a self-assembled monolayer (Self-Assembled Monolayer, SAM) defined by Microcontact Printing. ) as an etching cover for the silver electrode, in which the silver metal layer comes from the traditional electroless plating process, so that various structures of the transistor, such as electrodes, can be formed in a stamped manner, and a large number of steps can be repeated. The characteristics of this method are in the printed The definition of etching mask replaces yellow light and photolithography process, but the metallization process of this patent is still comprehensive deposition and needs to be matched with etching process

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  • Manufacturing method of metal layer direct pattern of semiconductor element
  • Manufacturing method of metal layer direct pattern of semiconductor element
  • Manufacturing method of metal layer direct pattern of semiconductor element

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Embodiment Construction

[0037] The present invention uses the direct patterning technology to match the material of the seed layer, and uses the electroless plating bath deposition method to make the metal layer in the semiconductor element, such as the metal thin film used for the reflective layer in the TFT array, or the wire and electrode layer in the semiconductor element etc., which combine direct patterned seed crystal technology and chemical bath deposition (Chemical Bath Deposition, CBD) technology to provide a non-vacuum, selective deposition thin film growth process as an alternative technology for making thin film transistor arrays . The present invention can be applied to the deposition and manufacture of large-area transistor arrays or large-area functional thin films. In addition to the use of this technology for the conductor layer of transistors, it can also be used on total reflection displays and partial penetration partial reflection displays. optical reflective layer film.

[003...

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Abstract

A method of utilizing direct patternization to prepare metal layer of semiconductor element uses direct patternization seed crystal technique and chemical plating both deposition technique to provide a film growth process of non-vacuum and selectively deposited mode for preparing metal layer of semiconductor.

Description

technical field [0001] A method for directly patterning a metal layer of a semiconductor element, in particular to a thin film growth process provided by direct patterning seed crystal technology and electroless plating bath deposition technology in the semiconductor element. Background technique [0002] Vacuum thin film deposition technology (Thin Film Deposition), yellow light and photolithography technology (Photolithography) have been the process technologies relied on in the manufacture of thin film transistors (Thin Film Transistor, TFT) for decades. Among the above-mentioned known technologies such as vacuum thin film deposition technology, yellow light and photolithography technology used in the manufacturing process of semiconductor elements, if the demand for large-size panels increases day by day, due to the increase in deposition substrates, equipment costs and material consumption will gradually become transistor arrays. However, in order to solve the technical...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/3205
Inventor 萧名男姜信铨庄博全
Owner 台湾薄膜电晶体液晶显示器产业协会
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