Digital signal processor with bit expansion and bit compressing compressing cell

A technology of digital signal and compression unit, applied in the field of digital signal processor, can solve the problem of inability to provide support for gigabyte data transmission rate, and achieve the effect of improving processor performance and high data throughput

Inactive Publication Date: 2007-09-26
SHANGHAI HUALONG INFORMATION TECH DEV CENT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

And this kind of programming design limited to assembly language is the bottleneck to improve the efficiency of software development
[0023] (2) There are still problems in the parallel structure
They help when the code density and data width match the application, but they can cause a lot of trouble when th

Method used

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  • Digital signal processor with bit expansion and bit compressing compressing cell
  • Digital signal processor with bit expansion and bit compressing compressing cell
  • Digital signal processor with bit expansion and bit compressing compressing cell

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Embodiment Construction

[0040] The technical solution of the present invention will be further described below in conjunction with the accompanying drawings.

[0041] As shown in Figure 1, the digital signal processor that the present invention applies comprises digital signal processor core, instruction storage, data storage, and wherein digital signal processor core comprises program control unit, instruction decoding unit, address generation unit, data operation unit , A bit expansion and bit compression unit is integrated in the data operation unit.

[0042] As shown in FIG. 2, the bit extension instruction of the present invention is realized by two source registers and one target register. Both source and destination registers are 16 bits. The data in the source register 1 represents the 16-bit mask number, and the data in the source register 2 is the expanded source data. According to the number of '1' in the 16-bit mask field, from the low bit to the high bit of the source register, these b...

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Abstract

This invention discloses one digital signal processor with bit expend and bit compression unit, which comprises digital signal processor nuclear, order memory and data memory, wherein, the nuclear comprises program control unit, order coding unit, address generation unit and data computation unit. This invention is characterized by the following: the computation unit is integrated with one bit expend and bit compression unit; the unit is composed of timer, displacement device and two source operation number and one aim register device.

Description

Technical field: [0001] The invention relates to a digital signal processor, especially a digital signal processor with a bit expansion and bit compression unit. Background technique: [0002] As we all know, the function of the microprocessor depends almost entirely on the instruction set, so to a certain extent, the development of the instruction set also represents the development of the microprocessor. Under the development trend of today's increasingly powerful microprocessors and faster speeds, the instruction set is also evolving, from simple instruction sets to complex instruction sets, and from complex instruction sets to single instructions with simple functions but instruction sets. Feature-rich RISC presents a spiraling state. [0003] The foundation of informatization is digitization. One of the core technologies of digitization is digital signal processing. The task of digital signal processing needs to be finished by DSP device to a great extent. DSP techn...

Claims

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Application Information

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IPC IPC(8): G06F9/318
Inventor 张达文李兴仁金荣伟刘春晖林锦麟杨一茜
Owner SHANGHAI HUALONG INFORMATION TECH DEV CENT
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