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Method of forming fine pattern of semiconductor device

A fine pattern, semiconductor technology, used in semiconductor/solid state device manufacturing, instruments, electrical components, etc., can solve problems such as difficulty in covering uniformity patterns

Inactive Publication Date: 2008-03-19
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] However, it is difficult to control the coverage uniformity in the cell area @ and form patterns with a size smaller than the minimum pitch due to the resolution limitation of the lithographic apparatus.

Method used

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  • Method of forming fine pattern of semiconductor device
  • Method of forming fine pattern of semiconductor device
  • Method of forming fine pattern of semiconductor device

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Experimental program
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Embodiment Construction

[0015] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

[0016] 2a to 2g are schematic diagrams illustrating a method of forming a fine pattern of a semiconductor device according to an embodiment of the present invention.

[0017] 2a to 2d are plan views showing one side of the pattern and another view of the pattern taken along the line - of FIG. 2a. 2e and 2f are schematic diagrams showing cross-sections viewed from the line - of FIG. 2a. FIG. 2g is a plan view showing two patterns having a bridge-like structure obtained through a photolithography process.

[0018] FIG. 2 a shows a base layer 23 formed on top of a semiconductor substrate 21 . The base layer 23 includes a conductive layer for interlacing to form a bridge pattern. Specifically, the base layer 23 may be a word line, a bit line, a metal line, or a combination thereof formed of polysilicon or a metal layer.

[0019] A first photoresist film (not...

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Abstract

The present invention discloses a method for forming a fine pattern of a semiconductor device comprising: forming a first photoresist pattern over a semiconductor substrate including an underlying layer. A cross-linking layer is formed on the sidewall of the first photoresist pattern. The first photoresist pattern is removed to form a fine pattern including a silicon polymer. A second photoresist pattern is formed that is coupled to the fine pattern. The underlying layer is etched using the fine pattern and the second photoresist pattern as an etching mask. As a result, the fine pattern has a smaller size than a minimum pitch.

Description

technical field [0001] The present invention generally relates to methods of forming fine patterns of semiconductor devices with pitches exceeding the limits of photolithography. Background technique [0002] Due to the spread of information media such as computers, the technology of semiconductor devices has advanced rapidly. Semiconductor devices must operate at high speed and have high storage capacity. Accordingly, semiconductor device manufacturing techniques must produce high-capacity memory devices with improved integration, reliability, and data readout characteristics. [0003] In order to increase the degree of integration of devices, photolithography techniques for forming fine patterns have been developed. The photolithography technique includes an exposure technique using a chemically amplified deep ultraviolet (DUV) light source such as ArF (193nm) and VUV (157nm), and a technique of developing a photoresist suitable for the exposure light source. [0004] T...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/027H01L21/768H01L21/3213G03F7/00
CPCG03F7/168G03F7/38H01L21/02362H01L21/0273H01L21/32139
Inventor 郑载昌
Owner SK HYNIX INC