Configuring and testing method and system in ATCA system

A test method and test system technology, applied in the direction of monitoring/monitoring/test arrangement, selection device, electrical components, etc., can solve the problems of affecting the test speed, unable to upgrade the master and backup of the CMM board, and affecting the upgrade speed, so as to reduce the research and development and production hidden dangers, realize high-speed automatic operation, and reduce the effect of manual intervention

Active Publication Date: 2008-05-14
ZTE CORP
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  • Abstract
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  • Application Information

AI Technical Summary

Problems solved by technology

This is the first unfavorable factor for the application of JTAG technology in ATCA
[0009] In addition, the communication method shown in Figure 4 requires the local controller on the single board, BMC (Baseboard Management Controller) or IPMC, to be in working state, if the local controller is not in working state, for example, in the factory production Under test conditions or the local controller is in a fault state for some reason, the JTAG test process will not be possible
This is the second unfavorable factor for the application of JTAG technology in ATCA
[0010] In addition, the PICMG AMC.0 Rx standard derived from the PICMG R3.0 standard has gradually increased the application of AMC sub-cards. The design of AMC sub-cards has become more and more complex and diverse, and more and more JTAG devices are used. The AMC standard only provides a set of JTAG interfaces. If all the JTAGs on the AMC are only strung together into a daisy chain as shown in Figure 3, as the number of devices increases, more and more BSCs in the daisy chain will inevitably affect the test speed.
This is the third disadvantage of the application of JTAG technology in ATCA
[0011] Existing patent documents include: Chinese patent application No. 200610063507.7 "A method and system for remote maintenance of JTAG devices in ATCA". , the effective download speed will be slower, seriously affecting the upgrade speed; relying on the BMC as the actuator for downloading data on the board, the BMC is the core device for the JTAG download of the board, if the BMC fails, the entire board cannot complete the online download, and there is a risk; BMC design, it is difficult to achieve system-level JTAG test, which makes JTAG technology lose its original function
[0012] In addition, the Chinese patent application No. 200710143086.3 "Boundary Scan System and Method Based on High-Performance Computing Communication Architecture" has the following disadvantages: the CMM board in the ATCA architecture cannot be upgraded from master to slave; the JTAG design of the AMC sub-card is not flexible enough , the use plan of JTAG is unclear, which may lead to increased test complexity; single board information cannot be obtained; the role of CMM in upgrading and testing has not been planned, and the test of CMM backup board may not be fully covered; the test type is single

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  • Configuring and testing method and system in ATCA system
  • Configuring and testing method and system in ATCA system
  • Configuring and testing method and system in ATCA system

Examples

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Embodiment Construction

[0050] The JTAG chain in the specific implementation manner may be a JTAG device or a connecting chain of multiple JTAG devices.

[0051] The system structure diagram of the specific embodiment of the present invention is shown in Fig. 5, including JTAG bridge chip, CMM and PLD.

[0052] The internal structure of CMM is shown in Figure 6.

[0053] The two CMMs determine the active and standby division of labor after the power-on logic competition through the connection between the two. The active CMM is the test control unit of the system, and the standby CMM is the single board to be tested.

[0054] CMM includes ETC (Embedded Test Controller). When CMM is used as the master, ETC is used to control the test and configuration process, and is responsible for sending test vectors to test and configure the target JTAG device. The test vector may be a file generated or stored by the CMM itself, or a file received from an external testing machine. As shown in Figure 7, CMM is co...

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Abstract

The invention discloses a configuration and testing system in a high-performance communication computing architecture system, comprising: a JTAG bridge, located on a single board to be tested, and used to gate the JTAG connected to the JTAG bridge under the control of a test control unit Device, JTAG chain, JTAG bridge and/or JTAG drive; test control unit, used to obtain test vectors for testing or configuration, and control the JTAG bridge to select the JTAG device and JTAG chain connected to the JTAG bridge , JTAG bridge chip and/or JTAG driver, so as to connect to the specified JTAG device and/or JTAG chain, and send the test vector to the specified JTAG device and/or JTAG chain for testing or configuration. Thereby, the test and configuration speed in ATCA are improved and the management board test and configuration can be performed.

Description

technical field [0001] The invention relates to the field of ATCA (Advanced Telecommunication Computing Architecture high-performance communication computing architecture), in particular to a configuration and testing method and system in the ATCA system. Background technique [0002] As demand for wireless and wireline services continues to grow, the telecommunications industry recognizes the need to move beyond proprietary or partially open architectures in order to gain more options. Therefore, PICMG (PCI Industrial Computer Manufacturers Group PCI Industrial Computer Manufacturing Organization) proposed the relevant specifications of ATCA's open hardware platform, called PICMG 3.X specification, which provides sufficient scalability and space for the new generation of network elements and supports multiple switching Protocols and interfaces provide a set of chassis-level management mechanisms, adopt industry-standard IPMI (Intelligent Platform Management Interface), and ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04Q3/00H04M3/24
Inventor 张凯樊荣虎周赞鑫查卫民
Owner ZTE CORP
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