Multipath accessible semiconductor memory device

A memory and semiconductor technology, used in static memory, memory systems, read-only memory, etc., to solve problems such as compromising transmission speed and increasing the number of device pins

Inactive Publication Date: 2008-10-15
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Also, this interfacing compromises transfer speed and increases device pin count

Method used

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Examples

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Embodiment Construction

[0021] The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. However, this invention can be embodied in many different ways and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, like reference numerals refer to like elements throughout.

[0022] FIG. 3 is a block diagram of a multi-processor system with multi-path accessible DRAM sharing shared use of flash memory according to an embodiment of the present invention. The multi-path accessible DRAM 400 is coupled between the first processor 100 and the second processor 200 . The first processor 100 may be used for application processing, and the second processor 200 may be an ASIC (Application Specific In...

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Abstract

A multipath accessible semiconductor memory device provides an interfacing function between multiple processors which indirectly controls a flash memory. The multipath accessible semiconductor memory device comprises a shared memory area, an internal register and a control unit. The shared memory area is accessed by first and second processors through different ports and is allocated to a portion of a memory cell array. The internal register is located outside the memory cell array and is accessed by the first and second processors. The control unit provides storage of address map data associated with the flash memory outside the shared memory area so that the first processor indirectly accesses the flash memory by using the shared memory area and the internal register even when only the second processor is coupled to the flash memory.; The control unit also controls a connection path between the shared memory area and one of the first and second processors. The processors share the flash memory and a multiprocessor system is provided that has a compact size, thereby substantially reducing the cost of memory utilized within the multiprocessor system.

Description

technical field [0001] Embodiments of the present invention relate to semiconductor memory devices. More specifically, embodiments of the present invention relate to a multipath accessible semiconductor memory device applicable between multiple processors. Background technique [0002] Generally, a semiconductor memory device having multiple access ports is called a multi-port memory. A memory device with two access ports is called a dual-port memory. A typical dual-port memory is used as video memory for image processing, having a RAM (Random Access Memory) port accessible in random order and a SAM (Sequential Access Memory) port accessible only in sequential order. A dynamic random access memory (DRAM) is configured to read from or write to a shared memory area in a memory cell array through a plurality of access ports. A DRAM without a SAM port is referred to herein as a multi-path accessible semiconductor memory device to distinguish it from a multi-port memory device...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/18G06F15/167
CPCG06F15/167G06F2212/2022G11C16/04G11C16/08G11C16/06
Inventor 权镇亨孙汉求李东瑀
Owner SAMSUNG ELECTRONICS CO LTD
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