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Shallow groove isolation construction and forming method thereof

A technology of isolation structures and shallow trenches, applied in the manufacture of electrical components, electrical solid devices, semiconductor/solid devices, etc., can solve problems such as short circuits between word lines, reduce internal stress of the substrate, and achieve the effect of providing stress relief

Inactive Publication Date: 2008-12-31
PROMOS TECH INC
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Problems solved by technology

In view of this, a method for forming a shallow trench isolation structure is provided. On the one hand, it avoids forming a cavity on the surface of the shallow trench isolation structure, which causes a short circuit between word lines. On the other hand, it can also be used in the trench Create a suitable hole to reduce the internal stress of the substrate, which is eagerly awaited by the industry

Method used

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  • Shallow groove isolation construction and forming method thereof
  • Shallow groove isolation construction and forming method thereof
  • Shallow groove isolation construction and forming method thereof

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Embodiment Construction

[0023] Firstly, a trench substantially having a wide top and a narrow bottom is formed in the substrate by conventional techniques. In detail, refer to Figure 2A , sequentially forming a pad oxide layer 203 and a pad nitride layer 205 on a substrate 201 to obtain a substrate 207 having the substrate 201 , the pad oxide layer 203 and the pad nitride layer 205 . Wherein, the method of forming the pad oxide layer 203 may be, for example (but not limited to): performing a thermal oxidation process on the substrate 201 at an appropriate temperature in an oxygen-containing environment free of moisture; in addition, the pad nitride layer 205 can be provided by, for example, but not limited to, a low pressure chemical vapor deposition process. The total thickness of the pad oxide layer 203 and the pad nitride layer 205 is generally 80 to 200 nanometers (nm), preferably 90 to 120 nanometers (nm), such as about 100 nanometers (nm).

[0024] Afterwards, a patterned photoresist layer 2...

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Abstract

The invention relates to a shallow trench isolation structure and a forming method thereof, the method comprises the following steps: a base plate is provided; a trench with a wider upper part and a narrower lower part is formed on the base plate; a first dielectric layer is formed so as to cover the upper part of the internal wall of the trench; a first etching process is executed so as to ensure that the internal wall of the trench which is not covered by the first dielectric layer is receded; the first dielectric layer is removed; and a second dielectric layer is formed so as to cover the trench and form a hollow hole in the trench.

Description

technical field [0001] The present invention relates to a method for forming a shallow trench isolation structure; specifically, the present invention is a method for forming a shallow trench isolation structure that contains empty holes and can release structural stress in the semiconductor element process. Background technique [0002] In the process of semiconductor devices with high transistor integrity, shallow trench isolation (shallow trench isolation) technology is often used to isolate transistors. Regarding this known shallow trench isolation technology, first refer to Figure 1A , a pad oxide layer 13 (pad oxide layer) and a pad nitride layer 15 (pad nitride layer) are sequentially formed on a substrate 11, wherein the pad oxide layer 13 can be formed by a thermal oxidation process, with a low pressure The pad nitride layer 15 is formed by a Low Pressure Chemical Vapor Deposition (LPCVD) process. After that, a patterned photoresist layer 17 (patterned photoresist...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/762H01L27/00H01L27/02
Inventor 洪国翔陈全基
Owner PROMOS TECH INC
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