32results about How to "Lower junction temperature" patented technology

The invention belongs to the technical field of semiconductor devices, and discloses a diamond-based CMOS (complementary metal oxide semiconductor) inverter and a preparation method thereof. The diamond-based CMOS inverter comprises a diamond substrate, a monocrystalline diamond film, a hydrogen terminal region, a mesa isolation region, an n-type oxide semiconductor layer, a first source electrode, a first drain electrode, a second source electrode, a second drain electrode, a first gate dielectric layer, a first gate electrode, a second gate dielectric layer and a second gate electrode. The first drain electrode and the second drain electrode are in metal interconnection; the first gate electrode and the second gate electrode are metal-interconnected. The diamond-based CMOS phase inverter is prepared by combining the p-type hydrogen terminal diamond and the n-type oxide semiconductor, so that the technical problem that an n-type MOS device is difficult to realize by the diamond at present is effectively avoided, respective advantages of the diamond and the n-type oxide semiconductor are fully exerted, and the high-performance diamond-based monolithic integrated CMOS phase inverter is realized.

The invention discloses a hydrogen terminal diamond / two-dimensional semiconductor monolithic integrated complementary device and a preparation method thereof. Comprising a diamond substrate, a diamond epitaxial film, a hydrogen terminal two-dimensional hole gas layer, a mesa isolation region, a two-dimensional semiconductor layer, a first source electrode, a first drain electrode, a second source electrode, a second drain electrode, a first gate dielectric layer, a second gate dielectric layer, a first gate electrode and a second gate electrode. The p-type hydrogen terminal diamond and the n-type two-dimensional semiconductor are combined together to prepare the diamond-based semiconductor complementary device, so that a monolithic integrated complementary device on the diamond is realized, the technical problem that an n-type MOS (Metal Oxide Semiconductor) device is difficult to realize by the existing diamond is effectively avoided, the respective advantages of the diamond and the two-dimensional material are fully exerted, and the application prospect is wide. And the high-performance diamond-based monolithic integrated CMOS device is realized.

The utility model relates to a uniform-temperature heat dissipation structure of a vehicle power device. The uniform-temperature heat dissipation structure comprises a heat dissipation bottom plate, a heat dissipation water channel arranged on one side of the heat dissipation bottom plate, and a plurality of chips arranged on the other side of the heat dissipation bottom plate. The heat dissipation water channel comprises a water channel body, a flow channel formed in the water channel body, a transverse boss arranged in the flow channel, at least three vertical bosses arranged on the transverse boss and at least six side wall bosses arranged at the two ends of the vertical bosses respectively. The height of the transverse boss is equal to the depth of the flow channel, the transverse boss is located in the middle of the flow channel, and the two ends of the transverse boss correspond to an inlet and an outlet of cooling liquid respectively. According to the structure, the three heat dissipation fin needles are distributed in the first area, the second area and the third area from sparse to dense to compensate the heat dissipation effect of the chips affected by the temperature of cooling liquid, so that the temperature difference between the chips is reduced, the reliability of the whole module is improved, and the service life of the whole module is prolonged.

The utility model relates to the technical field of packaging structures, in particular to a high-power parallel power module with a symmetrical packaging structure, which comprises an upper DBC board and a lower DBC board, a source electrode power terminal on the upper DBC board is connected with a source electrode loop copper-clad layer, a grid electrode driving terminal on the upper DBC board is connected with a grid electrode loop copper-clad layer, and a grid electrode power terminal on the lower DBC board is connected with a grid electrode loop copper-clad layer. A drain power terminal on the lower DBC board is connected with a drain loop copper-clad layer, a SiC MOSFET and a diode chip are arranged between the drain loop copper-clad layer and the source loop copper-clad layer, and the SiC MOSFET and the diode chip are connected with the upper DBC board through buffer conducting strips. According to the utility model, electrical connection of all parts in the module is realized by adopting the two DCB boards and the buffer conducting strip, so that the whole packaging structure of the module is simplified, double-sided heat dissipation of the SiC MOSFET and the diode chip is realized through the copper-clad layers arranged on the surfaces of the two DBC boards, the whole temperature of the module and the junction temperature of the chip are effectively reduced, and the service life of the module is effectively prolonged.

The invention discloses an LED chip with a bionic structure and a manufacturing method thereof. The LED chip with the bionic structure comprises a substrate, a P electrode, a P-GaN layer, an MQW layer, an N-GaN layer and an N electrode which are sequentially stacked from bottom to top, a first vertical hole is formed in the P electrode, a second vertical hole is formed in the P-GaN layer, a third vertical hole is formed in the MQW layer, a fourth vertical hole is formed in the N-GaN layer, the first vertical hole, the second vertical hole, the third vertical hole and the fourth vertical hole are communicated with one another, and the cross sections of the first vertical hole, the second vertical hole, the third vertical hole and the fourth vertical hole are all regular hexagons. The plurality of first vertical holes, the plurality of second vertical holes, the plurality of third vertical holes and the plurality of fourth vertical holes are distributed in a hexagonal honeycomb network to form a vertical hole group; a P layer transverse hole is formed in the P-GaN layer, an N layer transverse hole is formed in the N-GaN layer, and insulating heat conduction materials are arranged in the first vertical hole, the second vertical hole, the third vertical hole, the fourth vertical hole, the P layer transverse hole and the N layer transverse hole. The invention aims to solve the technical problem that the performance of an LED chip is limited due to the fact that high luminous efficiency and efficient heat dissipation are difficult to consider at the same time in the prior art.

The utility model discloses an adjustable light-emitting diode (LED) fish gathering lamp with a wide-angle lighting and forced air cooling structure, which comprises a lamp body shell, a lamp arranged in the lamp body shell, a heat dissipation fan, a wide-angle lens arranged at the bottom of the lamp body shell and used for increasing the lighting range, and a light diffusion plate arranged at the bottom of the lamp body shell. A heat dissipation air channel used for enhancing the heat dissipation effect is arranged in the lamp body shell, an adjustable installation part is arranged on one side of the lamp body shell, the illumination intensity and the illumination range are optimized, 165-degree wide-angle illumination is adopted to cover a fishing boat operation area, and the illumination uniformity is greatly improved. And a heat dissipation air channel is optimized, and forced air cooling is adopted, so that the junction temperature of the LED is greatly reduced, and light attenuation is delayed. The fishing boat has the functions of being adjustable in installation and convenient to adjust, adjustment at any time in daily use is facilitated, and various installation modes of the installation part are suitable for various fishing boat scenes.

The invention discloses a half-bridge power module packaging optimization method, and belongs to the technical field of power module packaging, and the method comprises the steps: S1, analyzing the thermodynamic performance of a power module; s2, establishing a two-dimensional power module finite element model; s3, based on finite element simulation, researching the influence of temperature on the service life and stress strain of the module; s4, based on finite element simulation, obtaining the thermal resistance value of each layer of material and the ratio of the thermal resistance value to the total thermal resistance value; s5, analyzing the relationship between the packaging parameters and the thermal impedance, and giving an optimization direction from the packaging level by integrating the temperature and the stress; and S6, establishing a thermal network model, extracting junction temperature through electrothermal coupling, and verifying life increase. By the adoption of the half-bridge power module packaging optimization method, the size of the module can be reduced, temperature resistance and stability can be enhanced, the problem of multi-physics field coupling can be solved, internal thermal impedance and stress strain can be remarkably reduced, thermal performance can be improved, and the service life of the power module can be effectively prolonged through verification of the working condition of a photovoltaic inverter.

The application provides a multi-chip stacked package structure and a preparation method thereof. The multi-chip stacked package structure comprises a first chip distributed on a substrate, a side surface of the first chip being covered by a first plastic package structure; a second chip stacked on the first chip, a side surface and a bottom surface of the second chip being covered by a second plastic package structure; and a heat dissipation structure comprising micro-flow channels located on both sides of the first chip and the second chip, the micro-flow channels penetrating a top surface of the second plastic package structure and extending to a bottom surface of the first plastic package structure, and side surfaces of the micro-flow channels being covered by the first plastic package structure and the second plastic package structure. The multi-chip stacked package structure can quickly conduct the heat generated by the chips to the outside of the overall package structure, avoid the accumulation of heat in the plastic package structure, and ensure the reliability and service life of the device.

The application relates to the technical field of motor control, and discloses a variable-frequency variable-voltage permanent magnet synchronous motor control method, which comprises the following steps: first step: establishing a model of a hidden-pole permanent magnet synchronous motor and an IGBT loss model based on an output period, and establishing the relationship between the two; second step: taking the quality of inverter output current as a constraint condition, and taking the switching frequency of the inverter and the DC bus voltage as constraint variables to establish an optimization target; third step: applying an optimization method to obtain the switching frequency and the DC bus voltage with the lowest IGBT loss based on the output period. The variable-frequency variable-voltage permanent magnet synchronous motor control method optimizes the DC bus voltage and the switching frequency of the motor, can reduce the IGBT loss to the maximum extent, thereby obviously reducing the junction temperature of the IGBT and prolonging the service life of the IGBT.

The utility model relates to the technical field of LED packaging, specifically relates to a kind of patch LED lamp pearl support structure, including support body, bowl cup, positive electrode conducting terminal, negative electrode conducting terminal, through-hole etc.The utility model overcomes the deficiency of prior art, by setting up metal filling through-hole on conducting terminal, establishes the efficient vertical heat dissipation path from chip to PCB board, effectively reduces the junction temperature of LED chip, improves luminous efficiency and life, the slope structure of bowl cup is combined with the high reflectivity coating in it, can more effectively reflect light and export, reduces internal absorption, improves brightness, metal through-hole enhances the embedding strength and combined tightness of metal terminal and plastic body, reduces the stress generated due to thermal expansion and contraction, improves the air tightness and anti-mechanical impact ability of product.

This application relates to a vertical pin LED chip holder, comprising a substrate. The top of the substrate has multiple evenly arranged supports. Each support includes two horizontal pins arranged parallel to each other vertically and a vertically bent pin at the right end of each horizontal pin. The tops of the two vertical pins are provided with solder pads. A first support rib connected to the substrate is located at the right end of one of the horizontal pins closest to the substrate, and a second support rib connected to the substrate is located at the left end of the two horizontal pins. This invention belongs to the field of LED light-emitting diode technology. It features a robust structure, is not easily deformed, and the vertical pin and double support rib design reduces the soldering offset rate to below 1%, improving stability.

The invention discloses a semiconductor laser with a lower waveguide layer for suppressing heat fading, which sequentially comprises a substrate, a lower coating layer, a lower waveguide layer, an active layer, an upper waveguide layer, an electron blocking layer and an upper coating layer from bottom to top, the waveguide layer under the low oscillation threshold is any one or any combination of an InGaN / GaN superlattice, an InGaN / AlGaN superlattice, an InGaN / AlInGaN superlattice, an InGaN / AlInN superlattice, a GaN / AlGaN superlattice, a GaN / AlInGaN superlattice and a GaN / AlN superlattice, and the thickness of the waveguide layer under the low oscillation threshold is 5-1000 nm. The waveguide side wall scattering loss and quantum well absorption loss of the laser are reduced, the internal light absorption loss of the laser is reduced, heat fading caused by non-radiative recombination is inhibited, the threshold current of the laser is reduced, and the slope efficiency is improved.

The invention discloses a multi-layer aluminum core copper-clad plate adopting a plasma oxidation-copper plating process and also discloses a preparation method of the copper-clad plate, and the preparation method comprises the following steps: carrying out plasma anodic oxidation and copper plating treatment on the surface of an aluminum substrate to obtain a copper-clad plasma anodic aluminum oxide substrate; manufacturing an inner-layer circuit pattern on the surface of the copper-clad plasma anodic aluminum oxide substrate, then overlapping the inner-layer circuit pattern with a copper foil and a prepreg, and carrying out vacuum hot-pressing curing to obtain a multi-layer plate blank embedded with an aluminum core; through holes are formed in the multi-layer plate blank, activation and copper plating treatment are carried out, and interlayer electrical interconnection is achieved; and manufacturing an outer-layer circuit pattern on the surface of the multi-layer plate blank, preparing a solder mask layer on the surface of the circuit, and carrying out nickel plating and gold leaching surface treatment to obtain the multi-layer aluminum core copper-clad plate. According to the method, the problems of weak interlayer binding force, low heat dissipation efficiency, insufficient electrical interconnection reliability and the like of the aluminum core multilayer board are solved, and the prepared copper-clad plate can meet the use requirements of high-frequency and high-power electronic equipment.

The invention discloses a trench Schottky barrier diode and a manufacturing method, a trench of the diode located in an epitaxial layer is in a step shape formed by a small upper cylindrical opening and a large lower cylindrical opening, conductive polycrystalline silicon is arranged in the trench, a dielectric layer isolates the conductive polycrystalline silicon from the epitaxial layer on the inner wall of the trench, and the dielectric layer is connected with the trench. The thickness of the dielectric layer on the inner wall of the upper cylindrical opening is smaller than that of the dielectric layer on the inner wall of the lower cylindrical opening. According to the trench and the upper cylindrical small opening, the conductive area during forward conduction is increased, and forward conduction voltage drop is reduced; the lower cylindrical opening is large, so that the point discharge effect during reverse bias of the device is avoided; furthermore, the dielectric layer covered on the inner wall of the lower cylindrical opening of the groove is thicker, and the pressure drop borne by the dielectric layer is increased during reverse bias; and the thin dielectric layer on the side wall of the upper cylindrical opening is beneficial to forming depletion pinch-off in the mesa structure epitaxial layer during reverse bias, so that the reverse blocking performance of the device is further improved, the reliability of the device is improved, and the service life of the device is prolonged.

The application discloses a lens module and an electronic device. The lens module comprises a holder structure, an opening is arranged on the holder structure, an installation cavity is arranged in the holder structure, and the installation cavity is communicated with the opening; a motor assembly is arranged in the installation cavity, the motor assembly can move relative to the holder structure, and the motor assembly is arranged opposite to the opening; a photosensitive chip is arranged in the installation cavity, and the photosensitive chip is connected to the side of the motor assembly which is away from the opening; and a heat dissipation structure, at least a part of the heat dissipation structure is arranged in the installation cavity, the part of the heat dissipation structure in the installation cavity is arranged on the circumferential side of the photosensitive chip; the part of the heat dissipation structure in the installation cavity is provided with a flow channel, a flowable heat dissipation medium is arranged in the flow channel, and the heat dissipation medium is used for conducting heat to the photosensitive chip. The application reasonably sets the structure of the lens module, can effectively reduce the temperature rise at the photosensitive chip, so that the probability of the imaging quality decline caused by the junction temperature rise of the photosensitive chip can be reduced.

The present application discloses a MOS device and a preparation method thereof, comprising a substrate and a drift layer on one side of the substrate, the drift layer having a first surface facing away from the substrate, a source region structure arranged in the drift layer and extending from the first surface to the substrate, the source region structure comprising a first injection region, a second injection region and a plurality of third injection regions, the first injection region being arranged at intervals in the drift layer and extending from the first surface to the substrate, the first injection region having a first side surface and a second side surface, the second injection region being in contact with the bottom surface and the first side surface of the first injection region respectively, the third injection region being arranged at intervals in the drift layer and extending from the first surface to the substrate, the third injection region being in contact with the second side surface, the bottom surface of at least one third injection region being in contact with the drift layer, the first injection region having a first doping type, and the second injection region and the third injection region having a second doping type. The invention solves the problem of low reliability of MOS devices caused by external FRD in the related art.

The invention discloses a high-integration microwave transceiving assembly, and belongs to the technical field of active phased-array antenna transceiving assemblies. According to the invention, the AlN HTCC substrate, the molybdenum copper or oxygen-free copper enclosure frame and the cover plate are adopted to form an integrated package, heat of the transceiving assembly can be dissipated through the solder balls at the bottom of the substrate, and multi-path heat conduction can be carried out to the side wall through the enclosure frame and to the heat dissipation part at the top through the cover plate, so that the package thermal resistance can be reduced greatly, the junction temperature of the chip is reduced, and the reliability of the package is improved. The chip reliability is improved; the types of chips in the transceiving assembly can be reduced from the six types to two types, so that the arrangement area of internal devices is effectively reduced, and the integration level of the transceiving assembly is improved; in addition, the reduced device arrangement area under the same packaging size can be used for increasing the side edge packaging thickness and improving the heat dissipation capability; by optimizing the circuit form, the types and the number of internal devices are reduced, the component cost is reduced, assembly is easy, and the production cost is reduced.

The utility model discloses a semiconductor laser packaging module. The semiconductor laser packaging module comprises a pin, a tube socket, a tube tongue, a heat sink and a laser chip, a first connecting layer is arranged between the laser chip and the heat sink; a second connecting layer is arranged between the heat sink and the tube tongue; the thermal resistance of the first connecting layer is less than or equal to that of the heat sink; the thermal resistance of the second connecting layer is smaller than or equal to that of the tube base; the thermal resistance of the second connecting layer is less than or equal to that of the first connecting layer; the thermal resistance of the second connecting layer is smaller than or equal to the thermal resistance of the tube tongue, thermal resistance bottleneck points of the laser module are reduced, the total thermal resistance of the laser module is reduced, and the junction temperature of the laser chip is further reduced, so that the thermal mismatch and temperature rise amplitude of the laser chip are reduced, the piezoelectric polarization and quantum restriction effect of the laser chip are reduced, and the reliability of the laser chip is improved. The quantum confinement effect, the radiative recombination efficiency and the heat reversal current density of the laser chip are improved, the mode hopping proportion is reduced, and the slope efficiency reduction in the aging process is improved.

The invention discloses a 2835 support-based flip chip LED packaging structure, which comprises a support body and an LED flip chip, a cavity is arranged in the support body, the bottom of the cavity is connected with a centrally arranged metal electrode, the LED flip chip is arranged in the cavity, the LED flip chip is connected with the metal electrode, a white glue layer is filled between the LED flip chip and the cavity, and the bottom of the cavity is connected with the metal electrode. A packaging layer is arranged above the white glue layer in the cavity; the invention further discloses an implementation method of the flip chip LED packaging structure based on the 2835 support. The LED flip chip is directly connected to the metal electrode through the eutectic bonding or solder paste sintering process, the PN electrode of the LED flip chip makes contact with the positive electrode and the negative electrode of the support body, no gold wire is needed for electrical connection, and therefore shielding and absorption of the gold wire to emergent light are thoroughly eliminated, and the light extraction efficiency is improved.

The application discloses a kind of micro electronic systems and integrated method. Specifically related to the field of semiconductor three-dimensional integrated packaging technology, the method comprises the following steps: S1, provide a semiconductor substrate, the semiconductor substrate surface is equipped with first linear strip I / O pin solder pad array and second linear strip I / O pin solder pad array;S2, provide a memory stack core particle, the memory stack core particle surface is equipped with third linear strip I / O pin solder pad array with the first linear strip I / O pin solder pad array is oppositely arranged;S3, provide a logic processor core particle, the logic processor core particle surface is equipped with fourth linear strip I / O pin solder pad array with the second linear strip I / O pin solder pad array is oppositely arranged.The application will be mechanically fixed and electrically decoupled, with low parasitic capacitance, good heat dissipation, easy repair, small stress, simple process, compatible high bandwidth memory and graphic processor thickness gap and other advantages.

The invention discloses a step-shaped groove Schottky barrier diode and a manufacturing method, the diode comprises a cathode metal layer, a substrate, an epitaxial layer, a functional metal layer and an anode metal layer from bottom to top, a step-shaped groove is distributed in the epitaxial layer, the groove is composed of an upper cylindrical opening and a lower cylindrical opening, the upper cylindrical opening is small, the lower cylindrical opening is large, and the functional metal layer is a metal layer. Conductive polycrystalline silicon is arranged in the groove, the dielectric layer isolates the conductive polycrystalline silicon from the epitaxial layer, the Schottky barrier region and the anode electrode region, and the epitaxial layer at the bottom of the groove further comprises an ion implantation region. According to the trench and the upper cylindrical small opening, the conductive area during forward conduction is increased, the forward conduction current density is reduced, the forward conduction voltage drop is reduced, and the forward conduction performance is improved; the lower cylindrical opening is large, so that the point discharge effect during reverse bias of the device is avoided, the reverse blocking performance of the device is improved, and the reliability and the service life of the device are improved.

A uniform-temperature flow channel of a TPAK power device comprises a heat dissipation bottom plate, a heat dissipation water channel covering the heat dissipation bottom plate and a plurality of chips welded on the heat dissipation water channel, the heat dissipation water channel comprises a body, an inlet formed in one side of the body, and an outlet formed in the other side of the body. The inlet is formed in the body, the outlet is formed in the side, away from the inlet, of the body, the first area is formed in the body, the second area is formed in one side of the first area, and the third area is formed in one side of the second area. The flow channel controls the flowing water flow speed in the first area, the second area and the third area through the first interval and the second interval, the first area, the second area and the third area correspond to three phases of the TPAK double-row double-tube power device respectively, and therefore the temperature difference between chips corresponding to the areas is reduced. The flow channel not only can improve the overall flowing water flow velocity, but also can reduce the temperature difference between the chips.

The utility model discloses a three-level power module and photovoltaic power generation equipment. The three-level power module comprises a direct current end, an alternating current end, a plurality of high-frequency switching devices and at least two low-frequency switching devices, the direct-current end is connected with a direct-current power supply or direct-current equipment. The AC end is connected with an AC power supply or AC equipment. Wherein the first end of the low-frequency switching device is connected with the direct-current end through the corresponding high-frequency switching device, and the second end of the low-frequency switching device is connected with the alternating-current end. The low-frequency switching device is arranged at the alternating current end of the three-level power module, so that the junction temperature of the three-level power module can be reduced, the junction temperature balance is improved, and the overall performance of the three-level power module is improved.

The embodiment of the invention provides a modulation method and system for improving temperature rise of a controller diode of an asynchronous motor, and belongs to the technical field of semiconductors. The modulation method comprises the following steps: acquiring the working condition of a current system; judging whether the current working condition triggers a preset triggering working condition or not; and under the condition that it is judged that the current working condition triggers the triggering working condition, the action time of the 0 vector of the motor is adjusted according to a preset temperature threshold value. According to the invention, through optimization of wave generation of the controller, junction temperatures under various working conditions can be improved, the current control performance can be ensured, and the cost can be reduced on the premise that a hardware circuit is not changed.

A uniform-temperature flow channel structure of a silicon IGBT and silicon carbide SBD diode hybrid power module comprises a heat dissipation bottom plate, a heat dissipation water channel arranged on the heat dissipation bottom plate, and a plurality of power modules arranged on the heat dissipation bottom plate. A plurality of heat dissipation fin needles are arranged on the side, facing the heat dissipation water channel, of the heat dissipation bottom plate at intervals. The heat dissipation water channel comprises a body, a first subarea arranged on the body, a second subarea arranged on one side of the first subarea and a third subarea arranged on one side of the second subarea. And at least two large bosses are arranged on the third subarea at intervals. The height of the large boss is larger than the height of the middle boss, and the heights of the small boss, the middle boss and the large boss are increased from low to high along with the flowing direction of cooling liquid, so that the heat dissipation effect of the first subarea, the second subarea and the third subarea is gradually enhanced, the influence of the cooling liquid after heat exchange is compensated, and the temperature difference between the power modules is reduced.

This invention provides a method and system for dynamic failure analysis and location of chips. The method includes the following steps: sending a test signal to a testing device; the test signal is used to control the testing device to perform a regional excitation operation; the regional excitation operation includes: sending a preset number of excitation signals to the chip under test (DUT) within each time window according to the sending order of the excitation signals; wherein, one excitation signal is used to activate a corresponding functional unit in the DUT, and functional units that do not receive an excitation signal are inactive; the preset number is less than the total number of functional units in the DUT; acquiring the state data corresponding to the activated functional unit; and forming a failure location result based on the state data. This invention reduces the instantaneous power consumption density of the DUT by regionalizing the signal, solving the problems of high cost and complex implementation of existing dynamic failure analysis and location methods for chips.

The invention discloses an active thermal management control method for a three-phase dual-active bridge DC-DC converter based on a SiC device. The method comprises the following steps: step 1, carrying out loss analysis on the three-phase dual-active bridge DC-DC converter; step 2, respectively establishing a Foster thermal model of the SiC MOSFET and a Foster thermal model of the three-phase high-frequency transformer; and step 3, performing active thermal management on the three-phase dual-active bridge DC-DC converter. Compared with a traditional single physical heat dissipation method, the method has the advantages that the junction temperature of the SiC MOSFET can be reduced on the basis of physical heat dissipation, so that the overall operation efficiency is effectively improved, the service life of the SiC device of the device can be prolonged, and the reliability of the system is improved.

The present invention discloses a transient high-efficiency heat dissipation system and method for power modules. The system includes a metal cavity close to the power module, a heat pipe array, and a plurality of phase change material modules with different thermal conductivities arranged in the metal cavity. The phase change material modules are arranged according to the heat flux density in the metal cavity to balance the heat flux non-uniformity on the surface of the power module during transient overcurrent. The evaporation section of the heat pipe array is embedded in the metal cavity and the phase change material module; the heat pipe is filled with a working fluid and a phase change microcapsule that can move with the working fluid; the phase change microcapsule absorbs external heat flow together with the working fluid, and is carried by the working fluid in the heat pipe to complete the heat cycle between the evaporation section and the condensation section. The system of the present invention has both steady-state and transient heat dissipation functions, can improve the heat storage capacity under the same volume, balance the heat non-uniformity, add micro phase change capsules to the heat pipe to prevent the heat pipe from drying out, and increase the maximum heat transfer power of the heat pipe.

This invention proposes a monolithically integrated microwave radiation system based on an optically triggered switch and its fabrication method, belonging to the field of high-power microwave technology. The system includes a driver wafer and a device wafer bonded together. The device wafer uses cubic boron nitride or hexagonal boron nitride as a substrate, on which a heterojunction optically triggered switch, a monolithic microwave integrated circuit, and a monitoring and protection module are integrated. The optically triggered switch is vertically integrated on the side of the monolithic microwave integrated circuit. Under the excitation of the optical pulse output from the driver wafer, it generates an electrical trigger signal, which is amplified by the monolithic microwave integrated circuit and outputs a microwave signal. This invention, through the synergistic design of an ultra-wide bandgap semiconductor substrate, a two-dimensional material heterojunction, three-dimensional integration technology, and full-dimensional on-chip monitoring, achieves chip integration from optical triggering, microwave amplification to intelligent protection on a nitride-based substrate, significantly improving power density, response speed, operating frequency, and reliability.

The invention relates to a multi-AMB splicing type novel power module and a manufacturing method, and belongs to the technical field of semiconductor instruments and manufacturing, a plurality of AMB copper layers are arranged on one insulating ceramic substrate, the plurality of AMB copper layers are carried through one insulating ceramic substrate, the distance between the insulating ceramic substrates with the AMB copper layers is 0 mm, the AMB copper layers are arranged on the insulating ceramic substrates, and the AMB copper layers are arranged on the AMB copper layers. The size of the AMB insulating ceramic substrate is greatly reduced, so that the size of the power module is reduced, and compared with a heat dissipation bottom plate of an existing module, the heat dissipation bottom plate is grooved in the surface of the heat dissipation bottom plate, and the AMB insulating ceramic substrate is arranged in the accommodating groove, so that the effect of reducing the weight and the size of the module is achieved; and the AMB insulating ceramic substrate is closer to the radiating fins of the radiating bottom plate, so that the radiating efficiency of the AMB insulating ceramic substrate is improved to the maximum extent under the condition that the size is reduced and the AMB insulating ceramic substrate is closer to the radiating fins.