Wafer level package of electronic element and manufacturing method thereof

Abstract

The invention provides a wafer grade encapsulating device of an electronic component and a manufacturing method thereof. The manufacturing method of the wafer grade encapsulating device of the electronic component comprises the following steps: a semiconductor wafer is supplied and comprises a plurality of electronic component chips, the semiconductor wafer and a bearing base plate are bonded, the back surface of the semiconductor wafer is thinned and is etched to form a groove, an insulating layer is deposited on the back surface of the semiconductor wafer in an adaptability mode, the insulating layer which is arranged at the bottom of the groove is removed, an interlaminar dielectric layer which is arranged at the bottom of the groove is removed, the partial surfaces of a pair of contact cushions are exposed, and a conducting layer is deposited on the back surface of the semiconductor wafer in an adaptability mode; after the semiconductor wafer is patterned, the semiconductor wafer and the contact cushions form an L-shaped connection, and an external conducting wire and a welding bump are formed. The invention can improve the adhesive property and the electric conductivity between the conducting wire structure and the contact cushions.

Description

technical field [0001] The invention relates to wafer-level packaging of electronic components, in particular to a wafer-level packaging of a CMOS image sensor and a manufacturing method thereof. Background technique [0002] Complementary metal-oxide-semiconductor field-effect transistor image sensors (CMOS image sensors) have been widely used in many application fields, such as digital still cameras (digital still cameras, DSCs). The above application fields mainly utilize active pixel arrays or image sensor cell arrays, including photodiode elements, to convert incident image light energy into digital data. [0003] A conventional chip scale package (CSP) for electronic components is designed for flip chip bonding on a carrier substrate such as a package substrate, a module substrate, or a printed circuit board (PCB). During the flip-chip bonding process step, it is necessary to bond soldering bumps, soldering studs or terminals on other packaged objects to matching cont...

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Problems solved by technology

[0005] see Figure 1B , because the contact surface 18a between the wire structure 18 of the T-shaped connection and the contact pad 22 is small, it is easy to cause reliability problems such as peeling

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