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Method and system for eliminating reaction ion auto-bias

A technology of reactive ion etching and ion etching, applied in electrical components, circuits, semiconductor/solid-state device manufacturing, etc., can solve the problems of semiconductor lattice damage, performance deterioration, device leakage increase, etc., and achieve the effect of reducing damage

Inactive Publication Date: 2009-04-01
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, when using a reactive ion etching machine to etch semiconductor materials (such as Si, GaAs, GaN, etc.) or remove glue, due to the self-bias V b The existence of the semiconductor material will cause serious damage to the semiconductor lattice, so that the leakage of the device made of the semiconductor material will increase and the performance will deteriorate.

Method used

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  • Method and system for eliminating reaction ion auto-bias
  • Method and system for eliminating reaction ion auto-bias
  • Method and system for eliminating reaction ion auto-bias

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Embodiment 1

[0021] Such as figure 2 As shown, in the embodiment of the present invention, an LC resonant circuit composed of an inductance coil L and a capacitor C is connected in parallel between the two electrodes (cathode and anode) of the RIE reaction chamber. Wherein, the inductance coil L and the capacitor C are connected in parallel, and the resonant frequency of the LC resonant circuit is the same as the frequency of the radio frequency (RF) power supply of the RIE reaction chamber. Through the inductance coil L in the LC resonant circuit, the DC self-bias voltage between the two electrodes of the RIE reaction chamber is short-circuited, so that the original DC self-bias voltage can be reduced to zero or close to zero; in addition, due to the parallel LC resonant circuit Resonance occurs at the frequency point of the RF power supply, and the impedance of the LC resonance circuit is the highest at this frequency point. Therefore, the introduction of the LC resonance circuit will n...

Embodiment 2

[0023] In practical applications, in order to maintain the advantages of fast RIE etching rate and overcome the disadvantage that RIE etching is easy to cause serious damage to the semiconductor lattice, during the etching process of RIE, the semiconductor lattice can be taken first. RIE fast etching with self-bias voltage, and then connect an LC resonant circuit in parallel between the two electrodes of the RIE reaction chamber, so that it can perform low-damage RIE etching without self-bias voltage, so as to reduce the surface lattice of semiconductor devices damage, improving device performance and yield, such as image 3 shown. The method adopted to realize the above-mentioned technical solution is: the LC resonant circuit is connected in parallel between the two electrodes of the RIE reaction chamber through a switch K; In the off state, the LC resonant circuit is not connected; when the semiconductor lattice is etched by RIE without self-bias voltage, the switch K is in...

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PUM

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Abstract

The invention discloses a method for eliminating self-bias voltage in reactive ion etching and a system thereof and belongs to the field of semiconductor processing and manufacturing. The method is as follows: an LC resonant loop which consists of an inductive loop L and a capacitance C is connected in parallel between two electrodes in the reaction chamber of reactive ion etching, and the resonant frequency of the LC resonant lop is the same as the frequency of the radio frequency power supply source in the reaction chamber of reactive ion etching. The system comprises a radio frequency power supply module, a matcher, a plasma device and a self-bias voltage eliminating module. By using the paralleled LC resonant loop, the self-bias voltage generated in normal reactive ion etching can short-circuit by the inductive loop, thus ensuring that the self-bias voltage in the reactive ion etching drops to zero or approaches zero and reducing the damage introduced by the reactive ion etching to the semiconductor crystal lattice.

Description

technical field [0001] The invention relates to the field of semiconductor processing and manufacturing, in particular to a method and system for eliminating self-bias voltage of reactive ion etching. Background technique [0002] Reactive Ion Etching (RIE) is one of the most commonly used processing methods in the manufacture of semiconductor devices and integrated circuits. Compared with general plasma etching (Plasma Etching, PE), it has fast etching rate, steep It has the advantages of good straightness and uniformity; compared with ICP (Inductive Coupled Plasma, inductively coupled plasma etching) and ECR (Electron Cyclotron Resonance, electron cyclotron resonance), it has the advantages of simple structure, low cost and convenient operation. . Based on the above advantages, reactive ion etching technology has been widely used in many technical fields, especially in etching SiO 2 In the case of materials and glue removal, etc., in this case, a certain ion bombardment ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/00H01L21/3065
Inventor 刘训春王佳周宗义李兵王建海黄清华
Owner SEMICON MFG INT (SHANGHAI) CORP