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Encapsulation structure and method for tablet reconfiguration

A technology of packaging structure and packaging method, which is applied in the manufacturing of electrical components, electric solid-state devices, semiconductor/solid-state devices, etc., can solve problems such as warping, increasing the difficulty of cutting process, and inability to align the package body.

Active Publication Date: 2009-07-08
CHIPMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This thinned chip is reconfigured on another substrate, and then multiple small chips are formed into a package by injection molding; because the chip is very thin, the package is also very thin, so when the package is detached After the substrate, the stress of the package itself will cause the package to warp, increasing the difficulty of the subsequent cutting process
[0006] In addition, after wafer dicing, when relocating the small piece on another substrate with a size larger than the original substrate, it is necessary to pick up the small piece through a pick & place device, and then turn the small piece over. The active surface of the chip is attached to the substrate in the flip-chip method, and in the process of flipping the chip by the pick-and-place device, it is easy to generate tilt (tilt) and cause displacement. For example, if the tilt exceeds 5 microns, it will make the chip Unable to align, which makes it impossible to align in the subsequent ball planting process, resulting in reduced reliability of the packaging structure
[0007] For this reason, the present invention provides a packaging method that forms an alignment mark on the back of the wafer and reconfigures the chip before wafer dicing, which can effectively solve the problem of inability to align when ball planting and The problem of package warpage

Method used

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  • Encapsulation structure and method for tablet reconfiguration
  • Encapsulation structure and method for tablet reconfiguration
  • Encapsulation structure and method for tablet reconfiguration

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Embodiment Construction

[0044] The direction of the present invention discussed here is a small chip reconfiguration packaging method, a method in which multiple small chips are reconfigured on another substrate and then packaged. In order to provide a thorough understanding of the present invention, detailed steps and their components will be set forth in the following description. Obviously, the practice of the invention is not limited to the specific details of the manner in which chips are stacked, with which those skilled in the art are familiar. On the other hand, the well-known chip formation method and detailed steps of back-end process such as chip thinning are not described in detail to avoid unnecessary limitation of the present invention. However, for the preferred embodiments of the present invention, it will be described in detail as follows, but in addition to these detailed descriptions, the present invention can also be widely implemented in other embodiments, and the scope of the pr...

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PUM

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Abstract

The invention relates to a chip reallocated packaging structure which comprises a chip and a plurality of weld pads allocated on the active surface of the chip; a packaging body is used for packaging the chip and exposing the weld pads; a polymer material layer with at least one seam covers the active surface of the chip, and each weld pad is exposed from the seam; one ends of a plurality of fanned-out wire sections are electrically connected every weld pad; a protective layer is used for covering the active surface of the chip and every wire section and exposing the other ends of the wire sections; and a plurality of electrically connected elements are electrically connected with the other ends of the wire sections, wherein, the packaging body adopts a two-stage thermosetting cement material.

Description

technical field [0001] The present invention relates to a semiconductor packaging method, in particular to a modular packaging structure formed by using a reconfiguration layer (RDL) after reconfiguring a chip or multiple chips to another substrate and its encapsulation method. Background technique [0002] Semiconductor technology has developed quite rapidly, so the miniaturized semiconductor chip (Dice) must have diversified functional requirements, so that the semiconductor chip must be configured with more input / output pads (I / O pads) in a small area. O pads), so that the density of metal pins (pins) is also rapidly increased. Therefore, the early lead frame packaging technology is no longer suitable for high-density metal pins; therefore, a ball array (Ball Grid Array: BGA) packaging technology has been developed. The ball array package has the advantage of higher density than the lead frame package. In addition, its solder balls are less prone to damage and deformati...

Claims

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Application Information

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IPC IPC(8): H01L21/50H01L21/56H01L21/60H01L23/48H01L23/31H01L25/00
CPCH01L24/19H01L24/96H01L2224/24137H01L21/568H01L2224/12105H01L2924/3511H01L2224/19H01L2924/00H01L2924/00012
Inventor 沈更新
Owner CHIPMOS TECH INC
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