Lining insulating layer high-density ionic depositing method

A technology of ion deposition and insulating layer, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as the influence of leakage current of integrated devices, achieve the elimination of leakage current and other negative effects of integrated devices, and eliminate notches Effect

Active Publication Date: 2011-03-23
SEMICON MFG INT (SHANGHAI) CORP
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Problems solved by technology

[0004] The object of the present invention is to provide a high-density ion deposition method for an insulating lining layer to solve the problem of the notch in the insulating lining layer between the shallow trench and the hard mask layer interface in the current manufacturing method for the insulating lining layer, thereby further solving the problem of Leakage current and other negative effects of integrated devices fabricated on this substrate due to notch issues

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Embodiment Construction

[0009] In the high-density ion deposition method of the insulating layer of the present invention, the high-density ion deposition of the insulating layer is carried out in a sealed reaction chamber. The top and side of the reaction chamber are connected with a reaction medium for forming an insulating layer and a conveying pipe for guiding the medium. The high-density ion deposition of the insulating layer uses radio frequency sputtering to deposit the insulating layer. The radio frequency sputtering includes two parameters: the decomposition power of the reaction medium and the sputtering power of the guiding medium used to guide the growth of the insulator. Wherein, the sputtering power of the guiding medium is 2.5-6.5 kilowatts, and the deposition time of the entire lining insulating layer is 3-15 seconds. Compared with the sputtering power of the guide medium used in the current conventional lining insulating layer, it can generate a denser guide medium flow, so that the ...

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Abstract

The invention provides a lining insulating layer high-density ionic depositing method, wherein insulating layer high-density ionic depositing is in a sealed reaction cavity; the top and the side edge of a sealed reaction cavity are connected with a conveying pipe of a reaction medium and a guiding medium capable of generating an insulating layer; lining insulating layer high-density ionic depositing makes use of radio frequency sputtering to realize insulating layer deposition; the radio frequency sputtering comprises two parameters, namely the decomposition power of the reaction medium and the sputtering power of the guiding medium used for guiding an insulator to grow; moreover, the sputtering power of the guiding medium ranges between 2.5 and 6.5 KW, and the deposition time of the entire insulating layer is between 3 and 15 seconds. Meanwhile, the method reduces the generation speed of the insulator by reducing the feeding speed and the amount of the reaction medium in the reactioncavity and adopts micromolecular hydrogen as a main guiding medium to increase the generating uniformity of the insulator. The depositing method can effectively eliminate notches existing in the prior insulating layer.

Description

technical field [0001] The invention relates to the manufacturing field of IC chip shallow trench isolation, in particular to a method for high-density ion deposition of a lining insulating layer before depositing insulators in shallow trenches in the manufacture of shallow trench isolation. Background technique [0002] With the advancement of the semiconductor industry, integrated circuits (Integrated Circuit: IC) are developing toward smaller feature sizes and higher operating speeds. When the feature size of ICs is getting smaller and smaller, how to effectively perform insulation isolation between IC components is a crucial issue in the development of integrated circuits. At present, in the manufacturing process of IC chips with small feature sizes, shallow trench isolation (Shallow Trench Isolation: STI) technology has been widely used to manufacture insulating structures between components. Since the fabrication of current IC chips is still mainly based on silicon ma...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/762H01L21/31H01L21/316
Inventor 李彬陈志刚周俊赵东涛
Owner SEMICON MFG INT (SHANGHAI) CORP
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