A method of manufacturing a semiconductor device

Abstract

The invention provides a method for manufacturing a semiconductor device and relates to the technical field of a semiconductor. The method comprises steps that a semiconductor substrate is provided, and a first polysilicon layer is formed on the surface of the semiconductor substrate; metal silicide is formed on the first polysilicon layer through deposition, the metal silicide is deposited in an chemical vapor deposition method, and deposition temperature is made to be greater than 440 DEG C; a second doped polysilicon layer is formed on the metal silicide through deposition. According to the manufacturing method, through enhancing the deposition temperature of the metal silicide and prolonging the deposition time non-doped polysilicon in the polysilicon layer on the metal silicide, stress of corresponding material layers is reduced, a problem of peeling of the metal silicide and the upper-layer polysilicon layer caused by change of stress generated in a later annealing process can be avoided, and thereby the yield and performance of devices are improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a semiconductor device. Background technique [0002] In some semiconductor devices using polysilicon gates, in order to improve device performance, it is generally desired that the gate resistance can be relatively small. There are generally several ways to reduce the polysilicon gate resistance: increasing the thickness of polysilicon; doping polysilicon; depositing metal silicide on polysilicon, etc. Among them, the tungsten silicide deposition process is a crucial process in the semiconductor process of 0.35 μm or more, which directly affects the polysilicon resistance. In the existing process, a doped polysilicon layer is often deposited on the tungsten silicide , online products found that after the high-temperature annealing process after the tungsten silicide deposition process (for example, high temperature 1035 degrees rapid thermal an...

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Problems solved by technology

Among them, the tungsten silicide deposition process is a crucial process in the semiconductor process of 0.35 μm or more, which directly affects the polysilicon resistance. In the existing process, a doped polysilicon layer is often deposited on the tungsten silicide , online products found that after the high-temperature annealing process after the tungsten silicide deposition process (for example, high temperature 1035 degrees rapid thermal annealing RTA after ion implantation), the edge stress of the wafer (wafer) changes, making the tungsten silicide change from the normal stress before annealing to Negative stress after annealing, while the doped polysilicon layer on it changes from the negative stress of the principle to the positive stress after annealing, such as figure 1 As shown, peeling occurs between tungsten silicide and its upper layer of polysilicon, which affects product yield and performance, and eventually makes the wafer scrap

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