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Phase factor combined circuit based on selective path

A phase factor and path selection technology, applied in multi-frequency code systems and other directions, can solve problems such as data blocking, and achieve the effect of low hardware consumption

Inactive Publication Date: 2012-10-31
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0016] In order to solve the problem of data blocking in the process of realizing PAPR optimization in the existing Orthogonal Frequency Division Multiplexing (OFDM) technology using the time-domain interleaving and splitting PTS method, the present invention provides a phase factor combination circuit based on path selection, It includes clock unit, state machine, four multipliers, four accumulators and four selectors;

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  • Phase factor combined circuit based on selective path
  • Phase factor combined circuit based on selective path
  • Phase factor combined circuit based on selective path

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specific Embodiment approach 1

[0028] Specific embodiment one: see Figure 4 This specific embodiment is described. A phase factor combination circuit based on the selection path, which includes a clock unit 1, a state machine 2, four multipliers, four accumulators ADD1, ADD2, ADD3, ADD4 and four selectors MUX1, MUX2, MUX3, and MUX4;

[0029] The data to be processed is respectively multiplied by the four phase factors through four multipliers through the first path path1, the second path path2, the third path path3, and the fourth path path4, and then the four multipliers respectively Output signals to four selectors MUX1, MUX2, MUX3, MUX4, and the four selectors respectively output signals to four accumulators ADD1, ADD2, ADD3, and ADD4;

[0030] The clock unit 1 outputs a clock signal to the state machine 2, and the state machine 2 outputs four control signals to the four selectors MUX1, MUX2, MUX3, and MUX4;

[0031] In each clock cycle Clock, the four control signals output by the state machine 2 are shown ...

specific Embodiment approach 2

[0057] Embodiment 2: The difference between this embodiment and the phase factor combination circuit based on the selection path described in the first embodiment is that the i-th accumulator ADDi is composed of an adder adderi and a register Ri, and the adder adderi inputs The signal is added to the output signal of the accumulator register Ri and then output to the accumulator register Ri. In the actual application process, the register Ri is cleared before the first clock cycle.

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Abstract

A phase factor combined circuit based on a select path relates to the field of integrated circuit design, and solves the problem of data jamming in operation by adopting an interleaved partitioning part transfer sequence method in time domain in the prior orthogonal frequency division multiplexing technology. The phase factor combined circuit based on the select path comprises the following working processes that: a state machine outputs four control signals in each clock cycle; four selectors select corresponding accumulators for outputting according to the four control signals output by thestate machine respectively; after four clock cycles, the process for accumulating data produced by combining phase factors is completed; and the IFFT conversion rates of the combination process of thephase factors based on the select path and the data are synchronous so as not to cause the data jamming or need a register to store the data and have low hardware consumption. The phase factor combined circuit based on the select path is suitable for a PTS method in the prior OFDM system.

Description

[0001] The invention relates to the field of integrated circuit design, in particular to an integrated circuit in the field of communication. Background technique [0002] As the orthogonal frequency division multiplexing (OFDM) technology has the advantages of high frequency band utilization and strong ability to resist multipath fading, it has attracted more and more people's attention. However, the main disadvantage of the OFDM system is that it has a large peak-to-average power ratio (PAPR), which is easy to cause nonlinear distortion, leading to signal distortion and deteriorating system performance. Therefore, it is necessary to try to reduce it. The PAPR methods for reducing OFDM signals mainly include direct shearing, repeated shearing and filtering, compression and expansion, coding, selective mapping (SLM), and partial transmission sequence (PTS). Among them, the PTS method is a distortion-free phase optimization technology, which can effectively reduce the PAPR of the ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L27/26
Inventor 王进祥吴新春付方发张建伟周彬关峰
Owner HARBIN INST OF TECH