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Safe high-speed differential serial interface

A high-speed differential, serial interface technology, applied in the direction of TV, simultaneous/sequential multi-TV signal transmission, electrical components, etc., can solve problems such as transmission mode, security and connection complexity defects, reduce EMI electromagnetic interference, simplify Connection, strong anti-interference effect

Inactive Publication Date: 2010-03-03
INST OF ACOUSTICS CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is aimed at the application of chip-to-chip interconnection and data transmission in system-level packaging, and overcomes the defects of high-speed interfaces in the prior art in terms of transmission mode, security and connection complexity

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Embodiment Construction

[0056] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0057] Such as figure 1 As shown, the secure high-speed differential serial interface of the present invention includes two parts: a transmitting end 10 and a receiving end 20 . Wherein, the transmitting end 10 includes a packing module 11, a chaotic algorithm encryption module 12, an encoding module 13, a parallel-to-serial conversion module 14 and a differential signal output circuit 15; the receiving end 20 includes an unpacking module 21, a chaotic algorithm decrypting module 22, and a decoding module 23 , a serial-to-parallel conversion module 24 , a data and clock recovery module 25 and a differential signal receiving circuit 26 .

[0058] The packing module 11 includes at least two functions of packing the data to be output and generating time synchronization packets. Wherein, the data packet includes at least two parts: header and dat...

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Abstract

The invention provides a safe high-speed differential serial interface which comprises a transmitting end and a receiving end, wherein the transmitting end comprises a packing module, a chaos algorithm encryption module, a coding module, a parallel-serial conversion module and a differential signal output circuit; and the receiving end comprises an unpacking module, a chaos algorithm decryption module, a decoding module, a serial-parallel conversion module, a data and clock recovery module and a differential signal receiving circuit. In the invention, chaos algorithm is adopted to encrypt thetransmitted data, thus effectively ensuring the safety of the data in the transmitting process; extra clock signals do not need to be transmitted so as to lead the connecting wires in the chip and thechip-interlinking and system-in-package to be reduced, thus simplifying the connection; and the differential serial structure is adopted, thus improving the capabilities of resisting the interferenceand noise, effectively reducing EMI electromagnetic interference, and having the advantage of low power consumption.

Description

technical field [0001] The invention relates to a differential serial interface, in particular to a safe high-speed differential serial interface. Background technique [0002] With the development of communication technology and semiconductor technology, the data transmission speed between chips is getting faster and faster. The demand for high-speed data transmission in today's society is pushing the interface technology to develop in the direction of high-speed, serial, differential and low power consumption. The advantage of the differential signal is that it has strong anti-interference and anti-noise capabilities, and effectively reduces EMI electromagnetic interference. The serial interface has the advantages of reducing connection, crosstalk, reducing EMI electromagnetic interference and low power consumption. Commonly used high-speed interfaces such as HDMI, DisplayPort, USB2.0, USB3.0, etc. all adopt a differential serial structure. [0003] In the application o...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/08H04N7/167H04N7/52
CPCY02B60/1228Y02B60/1235Y02D10/00
Inventor 华斯亮侯朝焕王东辉张铁军杨骅
Owner INST OF ACOUSTICS CHINESE ACAD OF SCI
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