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V-shaped sampling method of AD converter based on FPGA

A technology of converter and sampling value, which is applied in the field of V-shaped sampling by using FPGA to control AD ​​converter, which can solve the problems of sampling time deviation, phase difference of collection amount, and sampling out of synchronization, so as to reduce time difference, reduce phase error, The effect of reducing hardware costs

Active Publication Date: 2010-06-30
南京弘毅电气自动化有限公司
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Problems solved by technology

One AD conversion chip can realize the simultaneous conversion function of multiple analog signals, but with the increase of sampling channels, the use of multiple AD converters will inevitably lead to asynchronous sampling, and the sampling time deviation between different AD converters
For some automatic devices, the asynchronous sampling will cause the phase difference of the collected quantity, and serious consequences will result, such as the microcomputer protection device of the power system, the phase difference of the collected signal may cause the protection to malfunction

Method used

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  • V-shaped sampling method of AD converter based on FPGA
  • V-shaped sampling method of AD converter based on FPGA
  • V-shaped sampling method of AD converter based on FPGA

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Embodiment 1

[0020] figure 1 Taking 6 AD converters and 8 analog switches as examples, the hardware structure diagram of the FPGA-based V-shaped sampling method for AD converters in the present invention is given. In order to avoid interference between the analog quantities of each channel, the 8th input of each analog switch is grounded, and after each switch, the analog switch is switched to the ground for discharge. figure 2 It is the internal structure diagram of FPGA.

[0021] When the FPGA is working, first switch all the electronic switches to the first channel, at this time, the signals of the 1st, 8th, 15th, 22nd, 29th, and 36th channels enter the conversion channel of the AD converter. After AD samples this signal, the sampling data is stored in the internal RAM of FPGA. Then the FPGA first switches the input of the electronic switch to ground, and then switches to the second channel to start AD sampling. And so on until the 7th channel. After the 7th channel is collected, th...

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Abstract

The invention relates to a V-shaped sampling method of an AD converter based on FPGA, and the method comprises the following steps: analogue switches are accessed to the AD converter, and the AD converter is connected with the FPGA. The FPGA sampling process comprises the following steps: the FPGA selects a first channel of all analogue switches, then the AD converter is started to carry out conversion, data after conversion are read and then stored in an RAM inside the FPGA, and then the FPGA selects a second channel of the analogue switches, and so on; after the last channel of the analogue switches is selected, the FPGA selects the last channel, the last but one until the first channel again; after the data is collected, the FPGA reads the data from the RAM, and corresponding data of a channel which are collected in step 1) and step 2) are averaged to obtain one sampling value of the channel.

Description

technical field [0001] The invention belongs to the field of signal control, in particular to a method for controlling an AD converter by using FPGA to perform V-shaped sampling. Background technique [0002] With the development of automation technology, multi-channel data acquisition applications are essential, and the AD converter is a key device for realizing analog signals to digital signals. One AD conversion chip can realize the simultaneous conversion function of multiple analog signals, but with the increase of sampling channels, the use of multiple AD converters will inevitably lead to asynchronous sampling, and the sampling time deviation between different AD converters. For some automation devices, asynchronous sampling will result in a phase difference of the collected data, which may lead to serious consequences. For example, in the power system microcomputer protection device, the phase difference of the collected signal may lead to protection malfunction. C...

Claims

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Application Information

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IPC IPC(8): H03M1/54
Inventor 李从飞
Owner 南京弘毅电气自动化有限公司
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