Unlock instant, AI-driven research and patent intelligence for your innovation.

Manufacturing method of semiconductor device gate

A manufacturing method and semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as device failure and polysilicon layer damage

Inactive Publication Date: 2012-02-08
SEMICON MFG INT (SHANGHAI) CORP
View PDF1 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of this, the main purpose of the present invention is to provide a method for manufacturing the gate of a semiconductor device, which can solve the problem of using phosphorus-doped NMOS transistors, causing damage to the pre-doped polysilicon layer when removing the mask layer, and causing the device to fail. The problem

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Manufacturing method of semiconductor device gate
  • Manufacturing method of semiconductor device gate
  • Manufacturing method of semiconductor device gate

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0022] In order to make the object, technical solution, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and examples.

[0023] The fabrication method of the gate of the semiconductor device provided by the invention is especially suitable for the fabrication of the gate of the semiconductor device whose channel size is 65nm or below.

[0024] figure 2 It is a flowchart of a method for fabricating a gate of an NMOS transistor according to an embodiment of the present invention, which should not limit the protection scope of the present invention excessively. like figure 2 As shown, in step 201, a gate oxide layer is formed on the semiconductor substrate; in step 202, a first polysilicon layer is formed on the gate oxide layer; in step 203, the first polysilicon layer is pre-doped , and perform a quenching process; step 204, depositing a second polysilicon layer on th...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a method for manufacturing a gate of a semiconductor device. After a gate oxide layer is formed on a semiconductor substrate, a gate polysilicon layer is formed on the gate oxide layer. The key point is that the method for forming the gate polysilicon layer includes: Depositing a first polysilicon layer on the gate oxide layer; pre-doping the first polysilicon layer; the pre-doping adopts ion implantation, the ions are phosphorus ions, and the implantation dose is 2.0E15 to 5.0E15 atoms / cubic centimeter; depositing a second polysilicon layer on the pre-doped first polysilicon layer; forming a patterned mask layer on the second polysilicon layer and Etching the first polysilicon layer and the second polysilicon layer; removing the patterned mask layer. The application of the invention avoids the problem of damage to the pre-doped polysilicon layer in the process of removing the mask layer, resulting in device failure.

Description

technical field [0001] The invention relates to the technical field of manufacturing semiconductor integrated circuits, in particular to a method for manufacturing a gate of a semiconductor device. Background technique [0002] Currently, a semiconductor device generally includes a semiconductor substrate, a gate oxide layer on the substrate, and a gate polysilicon layer deposited on the gate oxide layer. With the development of semiconductor technology, the operating speed of semiconductor devices is getting faster and faster, the integration of chip circuits is getting higher and higher, and the power consumption is getting lower and lower, so that the characteristic size of the gate polysilicon layer of semiconductor devices, gate Parameters such as the thickness of the oxide layer gradually become smaller. For the technology generation with a precision of 65 nanometers or higher, the pre-doping technology of ion doping before etching the polysilicon layer has been widely...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28H01L21/336
Inventor 居建华
Owner SEMICON MFG INT (SHANGHAI) CORP