Writing system for static random access memory and memory

Abstract

The invention provides a writing system and a memory. The writing system is applied to the static random access memory. A simulation write circuit, a negative pulse voltage control circuit and at least one conventional write circuit are arranged in the writing system; and each conventional write circuit comprises a write driving circuit and a negative pulse voltage supply circuit. In the writing process, the simulation write circuit drives a simulation bit line to change the electric potential thereof, so the negative pulse voltage control circuit generates a negative pulse voltage control signal according to the electric potential of the simulation bit line. In each conventional write circuit, when the write driving circuit switches on a corresponding conventional bit line to a bias voltage end to drive the electric potential of the corresponding conventional bit line to change, the negative pulse voltage supply circuit can switch on the bias voltage end from a working voltage to a different negative pulse voltage according to the received negative pulse voltage control signal. The writing system can effectively shorten time required by writing a procedure and accelerate the operating frequency of the memory.

Description

technical field [0001] The present invention relates to a writing system and related devices, in particular to a device that can control the timing of negative pulse voltage introduction of each conventional writing bit line according to the potential change of the simulated writing bit line so as to improve the writing accuracy of SRAM A SRAM write system and related devices that improve performance, improve write speed, accelerate bit-line recovery, shorten memory operation cycles, and increase operating frequency. Background technique [0002] Semiconductor memory is an indispensable building block in modern electronic systems. Generally speaking, there are many memory cells arranged in the memory, and these memory cells are arranged in a matrix, the memory cells of the same row (row) are coupled to the same word line, and the memory cells of the same column are then coupled to the same bit line ( Or a pair / group of two-bit lines that are differential to each other). In...

AI Technical Summary

Problems solved by technology

If a negative pulse voltage is coupled to the bit line before the potential of the bit line is fully discharged to a low potential, the negative pulse voltage will not be able to effectively reverse (flip) the data stored in the memory cell

Due to the drift and change of the process, operating voltage and / or temperature will affect the charging and discharging time of the bit line, and jointly, the time point of introducing the negative pulse voltage becomes difficult to control correctly

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