Method and system for executing register type instruction in RISC (Reduced Instruction-Set Computer) processor

Abstract

The invention relates to a method and a system for executing a register type instruction in a RISC (Reduced Instruction-Set Computer) processor. The method comprises the following steps of: 1. if the condition that the available number of used type registers is insufficient when a register type instruction in an assembly code is executed is discovered, generating a macroinstruction corresponding to the register type instruction and replacing the register type instruction by using the macroinstruction; 2. carrying out instruction extraction, decoding, register reading, emission, execution and back-writing on the assembly code in a production line way; when decoding, recognizing whether the current instruction is the macroinstruction or the register type instruction; as for the register type instruction, adding a mark site for indicating the operand type into a register number and generating a complete register number; and when reading the register, reading the register corresponding tothe register number in a type register file appointed by the mark site of the complete register number of the current instruction. The invention can improve the program running performance without the limitation of the number of the specific type physical registers in the processor.

Description

technical field [0001] The invention relates to the field of computers, in particular to a method for executing register type instructions in a RISC processor and a system thereof. Background technique [0002] In the design of general-purpose RISC processors, in order to make full use of processor resources, pipelines are generally used. The pipelines are generally divided into fetching (Fetch), decoding (Decode), reading registers and launching (RegisterFile), executing (Execute), writing Back (WriteBack) level five, such as figure 1 shown. [0003] In most instruction sets using RISC, the operand is specified by the register number in the instruction, if the number of registers in the register file is 2 n , then n bits in the instruction are used to address the register. For the distinction between fixed-point registers and floating-point registers, it is judged by the instruction type. Take the MIPS instruction as an example, such as figure 2 As shown, it has three...

AI Technical Summary

Problems solved by technology

When data dependence occurs, the order of scheduling instructions can be used to remove the dependence, so that the program can achieve higher efficiency and better performance. However, instruction scheduling cannot completely solve the problems caused by data dependence.

If the previous instruction in the instruction queue has too long a delay from issue to completion, it will result in the need to insert too many valid instructions between instructions with data dependencies, and the number of registers required to schedule these instructions exceeds the number of registers already available. Some corresponding types of registers, resulting in insufficient registers

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