Method and device for analyzing reliability of integrated circuit

A technology of integrated circuits and analysis methods, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of not considering the influence of threshold shift, excessive pessimism, poor accuracy, etc.

Active Publication Date: 2011-02-02
FUDAN UNIV
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Problems solved by technology

Literature (12) put the threshold shift caused by NBTI (ΔV th ) is analyzed as a random variable, but does not take into account the influence of other process parameter disturbances on the threshold shift
Literature (13) considers both NBTI and process parameter disturbance factors in the analysis and optimization of standard library cells, but this method analyzes the NBTI effect based on the worst case, ignoring the influence of the working environment of the circuit itself. The result of the

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  • Method and device for analyzing reliability of integrated circuit
  • Method and device for analyzing reliability of integrated circuit
  • Method and device for analyzing reliability of integrated circuit

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Embodiment Construction

[0050] The integrated circuit reliability analysis method and device of the present invention will be further described below in conjunction with the accompanying drawings.

[0051] Before the reliability analysis of integrated circuits, it is first necessary to establish a stochastic analysis model for delay aging of unit circuits. When the unit circuit is not aged at time zero, its delay It can be expressed as

[0052] d 0 ( ξ ) r = Σ j = 0 P c ^ j Φ j ( ξ ) r

[0053] in It is a random vector of independent d-dimensional normal distribution obtained after principal component analysis (PCA) of Gaussian process paramete...

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Abstract

The invention relates to a method and a device for analyzing the reliability of an integrated circuit. In the analytical method, a unit circuit delayed aging stochastic analysis reference model in consideration with both negative bias temperature instability (NBTI) effect and process parameter perturbation is established, a scaling function and an equivalent aging time concept are provided to solve the delayed statistical distribution of a unit circuit under the actual work environment quickly from the reference model, and the pre-clipping process of the circuit is provided to reduce the complexity of reliable analysis. The device of the invention comprises an input unit, an output unit, a program storage unit, an external bus, a memory, a storage administration unit, an input/output bridging unit, a system bus and a processor. In the method and the device, the effect of the process parameter perturbation, the NBTI effect and the work environment of the circuit on reliability are considered simultaneously, and the complexity of the reliable analysis can be reduced effectively by utilizing the scaling function, equivalent aging time and the pre-clipping technology so as to realize the quick analysis on the reliability of super-large-scale integrated circuits in consideration with process deviation.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to an integrated circuit reliability analysis method and device considering process parameter disturbance and NBTI effect. technical background [0002] As the feature size of CMOS integrated circuits enters the nanometer scale, the service life and reliability of integrated circuits have become severe challenges in integrated circuit design. The reliability of integrated circuits is determined by the combined effects of process parameter disturbances of integrated circuits and aging factors during circuit operation (1). The reduction of the feature size of integrated circuits increases the difficulty of accurate manufacturing, and the disturbance of geometric and electrical parameters caused by manufacturing, such as the effective channel length of the device, threshold voltage, etc., has brought great impact on the performance and reliability of the device....

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Application Information

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IPC IPC(8): G06F17/50
Inventor 曾璇尚笠周海杨帆陆瀛海朱恒亮
Owner FUDAN UNIV
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