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Method for etching outer circuit of PCB product with high aspect ratio

A technology with outer layer lines and high aspect ratio, which is applied in the direction of removing conductive materials by chemical/electrolytic methods, which can solve the problems of tin thickness plating in small holes, short circuit between lines and scrapping, etc., and achieve the effect of broad market prospects.

Inactive Publication Date: 2011-02-16
DALIAN CHONGDA CIRCUIT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the method of prolonging the tin plating time is easy to produce a film on the outer layer of the circuit, resulting in a short circuit between the lines and scrapping; and extending the time and increasing the current still cannot electroplate the tin thickness of the small hole to more than 7.6um

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0020] Parameter requirements:

[0021] ●Inner core board: 0.089mm 1 / 1 (without copper) Number of layers: 32L

[0022] ●Inner line width spacing: Min 3.0 / 3.0miL

[0023] ●Outer line width spacing: Min 4.0 / 4.0miL

[0024] ●Sheet Tg: 170°

[0025] ●Outer copper foil: HOZ

[0026] Hole copper thickness: Min 25um

[0027] ●Solder mask: green oil

[0028] ●Surface technology: immersion gold

[0029] ●Completed board thickness: 4.5mm+ / -10%

[0030] ●Minimum aperture: 0.3mm

[0031] ●Working PNL size: 830mm*412mm

[0032] Board making process:

[0033] 1. Cutting - cut out the core board according to the board size 830mm*412mm, the thickness of the core board is 0.089mm 1 / 1 (excluding copper);

[0034] 2. Inner layer——Complete the exposure of the inner layer circuit with 5-7 grid exposure rulers (21 grid exposure rulers), etch out the inner layer circuit pattern after development, and the minimum measurement of the inner layer line width is 2.4miL;

[0035] 3. Inner layer ...

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Abstract

The invention discloses a method for etching an outer circuit of a PCB (printed circuit board) product with high aspect ratio, which comprises the following steps of: A) cutting a circuit board substrate, sticking a dry film, browning the inner layer, treating a pressing board, and then drilling the circuit board substrate; B) performing copper deposition plating on the full board or adding a board for plating; C) performing first film removal treatment on the pattern plated board; D) performing alkali etching treatment on the outer circuit after development; and E) performing tin removal treatment on the PCB obtained in the step D), inspecting qualification, and obtaining a finished product. The method for etching the outer circuit of the PCB product with the high aspect ratio can manufacture the product with aspect ratio of 15:1 to 30:1 or over by sticking the film again after the pattern plating is finished, using hole covering film exposure, covering the dry film on the hole for protection, adopting alkali etching and then removing the film and the tin; and the method has no defect of the PCB with high aspect ratio manufactured by prolonging the tin plating time or increasing the tin plating current density in the prior art.

Description

technical field [0001] The invention belongs to the field of PCB manufacturing technology, and in particular relates to a method for etching the outer layer circuit of a PCB product with a high aspect ratio. Background technique [0002] When the thickness of the circuit board is greater than 6mm and the aspect ratio is greater than or equal to 15:1, using negative etching (acid potion) on the outer layer will easily cause blockage due to too thick the board, and the circuit etching will be excessively scrapped; During tin plating, the tin in the middle part of the hole ≤ 0.4mm is thin, resulting in no copper in the etched hole and being scrapped. In the prior art, prolonging the tinning time or increasing the tinning current density is usually used to solve the problem of multilayer boards with high aspect ratios. However, the method of prolonging the tin plating time is easy to produce the film on the outer layer of the circuit, resulting in the short circuit between the ...

Claims

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Application Information

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IPC IPC(8): H05K3/06
Inventor 叶应才刘东姜雪飞
Owner DALIAN CHONGDA CIRCUIT
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