Clock switching method and device

Abstract

The invention discloses a clock switching method and device. The method comprises the following steps: firstly processing a clock selection signal to generate a first clock selection signal and a second clock selection signal, wherein when the clock selection signal transfers into a strobe clk2 state from a strobe clk1 state, the first clock selection signal transfers at the time of keeping at least one clk1 impulse of the strobe clk1 state; and the second clock selection signal transfers at the time of keeping at least two clk2 impulses of the existing blocking-up clk2 state after the first clock selection signal transfers; then taking the first and second clock selection signals as gating enable signals so as to respectively perform gating processing on the clk1 and the clk2; and finally outputting signals generated by the gating processing in a combination mode. In the invention, although the clock selection signals change at any time, burrs of an output clock do not generate, thus realizing smooth switching among clocks with any frequencies.

Description

technical field [0001] The invention belongs to the technical field of clock signal processing, and in particular relates to a clock signal switching method and a clock switching device. Background technique [0002] In the digital video processing chip, according to the needs of the application, it is often necessary to switch the input clock. For example: a video processing chip has two input clocks clk1 and clk2. When the video stream input to the video processing chip is at low resolution, the working clock of the chip is required to be clk1; when the video stream input to the video processing chip works at For high resolution, the working clock of the chip is required to be clk2. [0003] The switching time of the two input clocks clk1 and clk2 is completely unknown to this video processing chip. If no special processing is done, a selector is directly used to select one of the clock signal outputs, which may make the circuit of this video processing chip An unknown p...

AI Technical Summary

Problems solved by technology

For example, the Chinese utility model CN2872451Y discloses a new type of clock dynamic switching circuit. Although the problem of metastable state is solved to a certain extent, when the frequency difference between the fast and slow clocks is large, it is difficult to avoid the glitch phenomenon caused by the superimposition of the gate control output.

Invention patent CN100587652C discloses a clock switching method and a clock switching device. There are many steps and complicated operation, and it must be known in advance which of the two clock signals to be switched is which clock is faster and which clock is slow. The fast and slow clock signals must be The smooth switching of the clock signal can only be achieved by inputting to a specific port, so the actual application situation is not ideal

After logic simulation, we found that when the clock selection signal clk_sel changes near the rising edge of clk1 or clk2, the patented technology is not perfect for the metastable state, which may easily lead to logic confusion

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