Silicon wafer-level frequency testing method

A test method and frequency technology, which is applied in the field of frequency test at the silicon chip level, can solve problems such as increased test cost, reduced tester utilization rate, and fewer chips, and achieves the effects of reducing test cost, improving utilization value, and realizing function transformation

Active Publication Date: 2011-04-27
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The above two points will lead to a substantial increase in testing costs
[0003] However, many products now require frequency testing, so the existing memory testing machine cannot meet their testing needs, so fewer and fewer chips can be tested on this platform, and the utilization rate of the tester is significantly reduced
If the hardware is transformed, adding a frequency test module; or directly purchasing a new tester with a frequency test function will result in a substantial increase in test costs

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0007] The frequency testing method at the level of the semiconductor silicon chip of the present invention is to use the failure address memory resource of the memory tester to perform the frequency test on the memory tester. The memory tester itself does not contain a hardware module for frequency testing, and is mainly used for testing memory products. The failure address memory is a memory module of the memory tester itself, which has a recordable function and a large capacity. The memory tester includes a central processing unit, which can process data.

[0008] Described frequency test method comprises the following steps at least:

[0009] The first step is to select a scanning frequency, scan the waveform to be measured, and obtain the corresponding sampled analog signal by scanning. The scanning frequency is selected according to the estimated frequency of the waveform to be measured, and is generally selected as the estimated frequency of the waveform to be measured...

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PUM

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Abstract

The invention discloses a silicon wafer-level frequency testing method. Frequency testing is performed on a tester which is special for testing a memory type chip, namely a memory tester, by using a fail address memory resource of the tester. The method at least comprises the following steps of: selecting a scanning frequency to scan a waveform to be tested; selecting a reference voltage and converting an analogue signal obtained by scanning into a digital signal; storing the digital signal by using the fail address resource; and processing the stored data, calculating number of cycles in a fixed time and finally calculating the frequency. In the method, the memory type tester is directly utilized to test the frequency, so the testing function of the memory tester is expanded, the utilization rate is improved and the testing cot is reduced.

Description

technical field [0001] The invention relates to a silicon wafer level frequency testing method. Background technique [0002] In the existing testing in the semiconductor field, some testers are specially designed for memory testing. Since memory products do not need to perform frequency testing, these devices do not have frequency hardware modules, so frequency testing cannot be performed. If you want to use this type of machine for frequency testing, you need to modify the hardware of the machine and add a frequency testing module; or directly purchase a new type of tester that includes the frequency testing function. The above two points will cause a substantial increase in testing costs. [0003] However, many products now require frequency testing, so the existing memory testing machine cannot meet their testing requirements, so fewer and fewer chips can be tested on this platform, and the utilization rate of the tester is significantly reduced. If the hardware is tra...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R23/02G11C29/00
Inventor 缪小波谢晋春桑浚之辛吉升
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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