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Method for chemical mechanical polishing and forming method of metal interconnection layer

A metal interconnection layer, chemical mechanical technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems affecting the reliability of integrated circuits, metal interconnection layer short circuits, etc., to eliminate pits or spots, The effect of ensuring reliability

Inactive Publication Date: 2011-04-27
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0006] However, the problem is that in the actual production process, after the above-mentioned chemical mechanical polishing process, defects such as pits or spots often appear on the wafer surface, such as figure 1 As shown, these pits or spot defects 2 on the surface of the wafer 1 may cause a series of problems such as short circuit of the metal interconnection layer, thereby affecting the reliability of the integrated circuit

Method used

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  • Method for chemical mechanical polishing and forming method of metal interconnection layer
  • Method for chemical mechanical polishing and forming method of metal interconnection layer
  • Method for chemical mechanical polishing and forming method of metal interconnection layer

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Embodiment Construction

[0048] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0049] In the following description, a lot of specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways different from those described here, and those skilled in the art can do it without departing from the meaning of the present invention. By analogy, the present invention is therefore not limited to the specific examples disclosed below.

[0050] Secondly, the present invention is described in detail in combination with schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the gener...

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Abstract

The present invention provides a method for chemical mechanical polishing, comprising the steps of: supplying a wafer, wherein the wafer surface is provided with a metal layer; decreasing reactions between deionized water spray and the wafer surface; polishing the wafer surface to remove spare parts of the metal layer. Correspondingly, the present invention further provides a forming method of a metal interconnection layer. The step of decreasing reactions between deionized water spray and the wafer surface is performed before the wafer surface is polished, so that the method for chemical mechanical polishing and the forming method of metal interconnection layer can prevent the deionized water from contaminating on the metal layer of the wafer surface and prevent the deionized water from reacting with the metal layer to generate oxides; therefore, shortages of pits or spots at the wafer surface can be eliminated basically after the chemical mechanical polishing (CMP) process, and the reliability of integrated circuit is ensured.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a chemical mechanical polishing method and a method for forming a metal interconnection layer. Background technique [0002] With the increasing demand for high integration and high performance of ultra-large-scale integrated circuits, semiconductor technology is developing towards technology nodes with 65nm or even smaller feature sizes, and the computing speed of chips is obviously affected by the resistance capacitance delay (Resistance Capacitance) caused by metal wires. Delay Time, RC Delay Time). Therefore, in the current semiconductor manufacturing technology, copper metal interconnection with lower resistivity is used to replace the traditional aluminum metal interconnection, so as to improve the phenomenon of RC delay. [0003] Due to the low resistivity of copper, devices using copper as interconnection wires can withstand denser circuit arrangement...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768
Inventor 张斐尧李强彭凌剑闫大鹏
Owner SEMICON MFG INT (SHANGHAI) CORP
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