Saber-based circuit failure simulation analyzing method

A circuit fault and simulation analysis technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problems that analog circuits cannot be simulated, faults cannot be simulated, etc., and achieve the effect of improving efficiency

Active Publication Date: 2013-05-01
苏州天航长鹰科技发展有限公司
View PDF0 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The advantage of this type of fault simulation is that it can simulate the faults of digital circuits, but the disadvantage is that it cannot simulate the faults of analog circuits and digital-analog hybrid circuits, because the VHDL platform itself can only simulate digital circuits and cannot simulate analog circuits.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Saber-based circuit failure simulation analyzing method
  • Saber-based circuit failure simulation analyzing method
  • Saber-based circuit failure simulation analyzing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment example 1

[0142] An amplifying circuit is used to illustrate the fault simulation analysis method. The schematic diagram of the amplifying circuit is shown in figure 2 As shown, the waveform of the normal simulation output vload of the circuit is as follows image 3 As shown, the amplitude is a sine wave around plus or minus 12v.

[0143] The steps of the case implementation process are the above seven steps. For this case, for the failure mode selected in step 2, three failure modes, such as base-collector short circuit, base open circuit, and gain degradation, were selected for bipolar transistors; for transformers, pp pin open circuit, pp, pm were selected There are three failure modes of pin short circuit and parameter drift. After step five, the simulation results of each failure mode are obtained, as shown in Table 3. Step 6 There are two methods of fault criterion setting: waveform discrimination method and parameter discrimination method. In the waveform discrimination meth...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides a Saber-based circuit failure simulation analyzing method. The method is characterized by comprising the following steps: 1, performing Saber circuit function modeling and simulation; 2, determining the failure mode of a device to be simulated; 3, modeling the failure; 4, injecting the failure; 5, simulating a failed circuit to generate a failure simulation result; 6, setting a failure criterion; and 7, giving a failure analyzing result. Regarding the problem that the conventional circuit failure simulation can be only used for digital circuits, the method provides a practical failure simulation method based on the digital-analog hybrid simulation platform Saber. Furthermore, many failure simulation models which cannot be solved by predecessors are added, and 48 failure modes can be simulated. Realization of automatic failure injection greatly improves the failure simulation efficiency. The direct interface between Saber and failure simulation is broken through,and an effective signal failure determination method is provided.

Description

(1) Technical field: [0001] The invention provides a circuit fault simulation analysis method based on Saber (Saber is a hybrid system simulation software of Synopsys Company of the United States), which belongs to the field of circuit fault simulation analysis. (two) background technology: [0002] Fault simulation technology is an analysis technology developed for analyzing system performance and functional testing, which combines fault modeling, fault injection and system performance simulation. It uses digital simulation as a means to analyze the failure mechanism and manifestation of each component unit in the system, and builds a system failure simulation model on the basis of the original function model of the system to realize the process of analyzing the system with failure units. [0003] Circuit fault simulation is a technology that combines fault injection and circuit simulation. According to the fault mechanism of the device, faults are injected into the circuit...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
Inventor 赵广燕孙宇锋高婷许健
Owner 苏州天航长鹰科技发展有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products