Device for detecting single event effect of 1553B interface circuit

A single-event effect and interface circuit technology, which is applied to measurement devices, data exchange through path configuration, and electrical measurement, can solve the problems of limited internal memory observation capabilities and the inability to effectively evaluate the number of single-event flips. The effect of increasing reliability and confidence

Inactive Publication Date: 2011-09-14
BEIJING MXTRONICS CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the SRAM memory is embedded in the 1553B interface circuit. Using the traditional method, only the logic of the peripheral interface can be observed by using an oscilloscope, and the ability to observe internal memory flips is limited, and the number of single event flips cannot be effectively evaluated; at the same time, 1553B is used as Serial communication bus, the function interruption of 1553B interface circuit single event effect can only be evaluated under the actual 1553B bus communication situation, so the single event effect detection system of 1553B interface circuit cannot use irradiated devices and non-irradiated devices The method of output comparison should simulate the real multi-node 1553B bus system

Method used

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  • Device for detecting single event effect of 1553B interface circuit
  • Device for detecting single event effect of 1553B interface circuit
  • Device for detecting single event effect of 1553B interface circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0024] Test vector: test the number of single-event flips in memory in a radiation environment (only the number of flips is recorded, and the address of the flip is not recorded), which belongs to SEU and SEL tests.

[0025] Test object: B61580 internal 4K SRAM memory.

[0026] Test environment: heavy particle environment

[0027] Test scheme: Read and write the internal 4K memory of the tested 1553B interface circuit through the processor DSP, automatically judge whether each unit has flipped, and send the accumulated flipped number to the monitoring host through the serial port, and display it in an intuitive graphical form.

[0028] Test plan process:

[0029] (1) Set a specific memory test pattern through the monitoring host;

[0030] (2) The monitoring host sends a memory test command to the processor;

[0031] (3) The main control processor receives the correct memory test command, sends an ACK response to the monitoring host, and writes the test pattern to the B61580...

Embodiment 2

[0035] Test vector: In a radiation environment, conduct a functional test on the B61580 interface circuit, and observe its SEU, SEFI and SEL effects affected by single events in the actual 1553B bus communication state. There are multiple test scenarios for functional testing, which can be divided into:

[0036] By setting parameters or configuring registers and memory in the BC mode interface under the function test, SEU, SEFI, and SEL detection of the bus controller (BC) mode can be performed.

[0037]SEU, SEFI, and SEL detection in RT mode can be performed through the "RT Send Data" and "RT Receive Data" menus in the RT mode interface under function test.

[0038] Use the "BC mode A channel" menu and "BC mode B channel" menu in the functional test to perform SEL tests on two transceiver units.

[0039] Test object: B61580 circuit internal protocol logic, registers, memory and transceiver A / B channel.

[0040] Test environment: heavy particle environment

[0041] Test sch...

Embodiment 3

[0048] Test vector: In a radiation environment, conduct a mode code function test on the B61580 interface circuit, observe the logic circuit corresponding to its bus management and control functions, and SEU, SEFI and SEL affected by the single event effect.

[0049] Test object: B61580 circuit internal protocol logic, registers, memory.

[0050] Test environment: heavy particle radiation environment

[0051] Test plan: mode code test under BC mode, its essence is that B61580, as BC, sends corresponding mode code commands to the bus according to the selected mode code. Can perform SEU, SEFI, SEL detection of the mode code in BC mode of the bus controller.

[0052] The essence of the mode code test in RT mode is that B61580 acts as RT, and responds correctly to the mode code command received from the bus according to the set mode code invalidation table. Can perform SEU, SEFI, SEL detection of the mode code in the RT mode of the bus controller.

[0053] Test plan process:

...

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Abstract

The invention discloses a device for detecting the single event effect of a 1553B interface circuit. The device is connected with a monitoring host through a 1553B bus; in a real 1553B bus communication environment, a tester controls a digital signal processor (DSP) through the monitoring host to transmit various test modes to the tested 1553B interface circuit and execute a multi-scene, multi-vector and multi-round single event effect test; various single event effects such as single event turning, single event latching, single event function interruption and the like of the tested 1553B interface circuit under irradiation of a radiation source can be detected by the DSP; and trial tests under different environmental conditions of high temperature, low temperature, vacuum and the like can be implemented, and reliable and effective test data can be acquired, so the reliability and the credibility of the test data are improved. In the device, a plurality of currents of a protocol logiccircuit, a transceiver and the like in the 1553B circuit can be monitored and controlled by a sampling circuit; and correct and effective feedback control can be provided for data receiving and result analysis.

Description

technical field [0001] The invention relates to a single event effect detection device for a 1553B interface circuit, which is used for detecting single event effects such as single event reversal, single event latch, and single event function interruption of the 1553B interface circuit. Background technique [0002] Device-level single event tests at home and abroad usually use the method of comparing the output of irradiated devices and non-irradiated devices under the same test vector, and determine the single event effect by comparing the difference in output results. The comparison method can be external monitoring or manual operation, that is, in the irradiation environment, a logic analyzer, oscilloscope and ammeter are connected to the test system to observe the irradiated device and the non-irradiated device. When locked, record the data and cut off the power manually. However, the SRAM memory is embedded in the 1553B interface circuit. Using the traditional method...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/30H04L12/40
Inventor 朱向东周皓赵康李蓉范隆郑宏超
Owner BEIJING MXTRONICS CORP
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