Semiconductor packaging bonding process

Abstract

The invention discloses a semiconductor packaging bonding process comprising the following steps: a) carrying out adhesive coating: providing a wafer, wherein the wafer is provided with a front side and a back side, the back side of the wafer is a naked silicon side and coated with a layer of adhesive; b) cutting: cutting the wafer coated with the adhesive, so as to form a plurality of chips which are separated from one another; and c) bonding the surface, coated with the adhesive, of each separated chip with a base plate. For the semiconductor packaging bonding process, the back side of the whole wafer is directly coated with the adhesive layer, and then the wafer is cut into single chips, so that the time and labor for adhesive dispersing on the base plate can be saved, the process is simpler, the operability is strong and the production efficiency is greatly improved.

Description

technical field [0001] The invention relates to a chip bonding process, in particular to a chip bonding process for semiconductor packaging. Background technique [0002] Semiconductor packaging refers to the process of processing the tested wafers according to the product model and functional requirements to obtain independent chips. Such as figure 1 As shown, the process steps of the existing semiconductor packaging process are: 1) paste the tape layer on the back of the wafer; 2) cut the large-size wafer into single chip units; 3) coat the rings one by one on the substrate Oxygen resin glue; 4) Place the cut chip units one by one on the glue-coated substrate; 5) Bond the chip and the substrate after baking; 6) Perform the conventional process of semiconductor packaging. The conventional process of semiconductor packaging includes: connecting the tiny pads on the chip with the designed pins on the substrate through wire bonding technology to complete the electrical inter...

AI Technical Summary

Problems solved by technology

Due to the need to dispense glue one by one and absorb one by one, the production time of the existing chip bonding process is longer, the production efficiency is low, and the glue layer is uneven due to the glue dispensing process, which often causes chip unevenness

[0004] In addition, the existing semiconductor packaging technology is mostly used for conventional semiconductor packaging products with a packaging size of 3mm*4mm*1mm. The miniaturized package body of the product, because the product is extremely small, the adhesive glue required is also very thin, so the amount of glue dispensing must be strictly controlled to avoid the problem of glue overflow after the chip and the substrate are bonded, which is a problem for the existing packaging technology Regardless of material performance, machine precision, process parameter control, process stability and repeatability, the existing process technology has been unable to package such tiny products, and its die-bonding process has been unable to meet the needs of small-volume packaging. body packaging requirements

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