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Integrated structure and manufacturing method of an infrared focal plane array detector

An array detector, infrared focal plane technology, applied in the direction of electric radiation detectors, semiconductor devices, radiation control devices, etc., can solve the problems of signal processing integrated circuit IC stability, unfavorable reliability, temperature rise, heat accumulation, etc. , to achieve the effect of reducing thermal interference and improving stability

Inactive Publication Date: 2011-12-14
PEKING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

With this integrated structure, since the infrared sensitive element array is next to its signal processing integrated circuit IC, the heat absorbed by the infrared sensitive element will be transferred to the integrated circuit IC area. As the working time increases, the heat accumulates and the temperature rises; The stability and reliability of the signal processing integrated circuit IC are very unfavorable, and will eventually affect the performance of the uncooled infrared focal plane array detector

Method used

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  • Integrated structure and manufacturing method of an infrared focal plane array detector
  • Integrated structure and manufacturing method of an infrared focal plane array detector
  • Integrated structure and manufacturing method of an infrared focal plane array detector

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0044] Embodiment one (flow process is as figure 2 shown)

[0045] Step 1, such as Figure 2(a) ~ Figure 2(d)As shown, a first wafer is provided, a first through-silicon via micro-interconnection TSV and a second through-silicon via micro-interconnection TSV are provided on the first wafer, and a first through-silicon via micro-interconnection TSV is fabricated on the first surface of the first wafer. An electrical contact element, the first TSV micro-interconnection TSV and the second TSV micro-interconnection TSV are electrically connected to the first electrical contact element. First, photolithography, making the photolithography mask of the first through-silicon via micro-interconnection TSV and the second through-silicon via micro-interconnection TSV, deep reactive ion etching (DRIE) silicon substrate, making the first TSV 0011 and the second TSV 0210, such as figure 2 (a) shown. The first TSV 0011 and the second TSV 0210 can also be fabricated using other techniqu...

Embodiment 2

[0050] Embodiment two (flow process is as image 3 shown)

[0051] Step 1, such as Figure 3(a) ~ Figure 3(d) As shown, a first wafer is provided, and the first TSV and the second TSV are fabricated on the first wafer. On the first wafer, the Fabricating a first electrical contact element on one surface, the first through-silicon via micro-interconnection TSV and the second through-silicon via micro-interconnection TSV are electrically connected to the first electrical contact element; on the first wafer A patterned adhesive layer 0050 is formed on the first surface, exposing the electrical contact element 0020; the outer surface of the first electrical contact element 0020 is at the same level as the outer surface 0050 of the patterned adhesive layer. First, photolithography, making the photolithography mask of the first through-silicon via micro-interconnection TSV and the second through-silicon via micro-interconnection TSV, deep reactive ion etching (DRIE) silicon substr...

Embodiment 3

[0056] Embodiment three (flow process such as Figure 4 shown)

[0057] Step 1, such as Figure 4(a) ~ Figure 4(d) As shown, a first wafer is provided, and a first through-silicon via micro-interconnection TSV 0010 is provided on the first wafer to make a first electrical contact element 0020 on the first surface of the first wafer, and the first silicon A through-hole micro-interconnection TSV is electrically connected to the first electrical contact element. First, photolithography, making the photolithography mask of the first through-silicon via micro-interconnection TSV, deep reactive ion etching (DRIE) silicon substrate, making the first through-silicon hole 0011, as Figure 4 (a) shown. The first TSV 0011 can also be fabricated using other techniques, such as laser drilling. Electroplating fills the first through-silicon via from bottom to top. First, deposit a dielectric layer, a barrier layer, and an electroplating seed layer. The dielectric layer realizes the ele...

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Abstract

The invention discloses an infrared focal plane array seeker integrated structure and a manufacturing method, belonging to the field of semiconductor manufacturing. The structure comprises a first silicon wafer and a second silicon wafer; a second surface of the first silicon wafer is provided with an infrared sensitive element array and a bonding pad; a first surface is provided with a pluralityof first electric contact elements; the first silicon wafer is provided with a plurality of first silicon through hole micro interconnections and a plurality of second silicon through hole micro interconnections; the infrared sensitive element array is correspondingly and electrically connected with the first electric contact element through the first silicon through hole micro interconnections; the bonding pad is correspondingly and electrically connected with the first electric contact element through the second silicon through hole micro interconnections; the first surface of the second silicon wafer is provided a signal processing circuit of the infrared sensitive element and a plurality of second electric contact elements which are electrically connected with the signal processing circuit; and the first electric contact element and the second electric contact element are respectively and correspondingly connected. According to the invention, the thermal disturbance is reduced, and the stability and reliability of a non-refrigeration infrared focal plane array seeker are improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, specifically to the field of silicon microsensor manufacturing and microelectronic packaging; more specifically, it relates to an integrated structure and packaging structure of an infrared focal plane array detector and a manufacturing method thereof. Background technique [0002] The uncooled infrared focal plane array detector has technical characteristics such as no refrigeration, high responsivity, high sensitivity, and miniaturization, and has attracted the attention of academia and industry. At present, the research in the industry focuses on the uncooled microbolometer focal plane array detector using the thermal resistance effect and the micro cantilever infrared focal plane array detector based on the dual material effect. [0003] The monolithic integration scheme of the uncooled infrared focal plane array detector is mainly produced by the Post-CMOS process. Firstly, the int...

Claims

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Application Information

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IPC IPC(8): H01L27/144G01J5/20H01L31/18
CPCY02P70/50
Inventor 马盛林朱蕴晖孙新金玉丰陈兢缪旻
Owner PEKING UNIV
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