static random access memory formed on soi substrate

Abstract

The static random access memory formed on the silicon-on-insulator substrate of the present invention adopts an SOI substrate, and the drains of the first pull-up transistor (PU-1) and the first pull-down transistor (PD-1) pass through the SOI The first connection active region SL-1 of the substrate is connected, and the first connection active region SL-1 is connected with the source of the first transfer gate transistor (PG-1); the second pull-up transistor (PU- 2) It is connected with the drain of the second pull-down transistor (PD-2) through the second connection active area SL-2 of the SOI substrate, and the second connection active area SL-2 is connected with the second transfer gate transistor (PD-2) at the same time. The sources of PG-2) are connected to each other without using the first metal layer to realize the interconnection of each transistor, thereby saving one metal layer.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a static random access memory formed on a silicon-on-insulator substrate. Background technique [0002] Usually, the storage unit of SRAM (Static Random Access Memory) consists of two pull-down transistors (also called drive transistors), two pull-up transistors (also called load transistors) and two transfer gate transistors (also called transfer transistors, access transistors, active transistors). [0003] Such as figure 1 As shown, the circuit of a conventional SRAM memory cell in figure 1 shown in . In the storage unit 100, the two pull-up transistors (PU-1, PU-2) 110, 115 are PMOS transistors, and the two pull-down transistors (PD-1, PD-2) 120, 125 are NMOS transistors, thus forming two The flip-flop circuit of the cross-latch CMOS inverter, so that the memory cell 100 has two stable states for representing "0" and "1", two pass-gate transistors (PG-...

AI Technical Summary

Problems solved by technology

[0008] The technical problem to be solved by the present invention is to provide a static random access memory formed on a silicon-on-insulator substrate to solve the problem of more bit line metal layers required in the SRAM unit of the prior art

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