Federate node device and implementation method of high level architecture (HLA) system framework
A technology of implementation method and system architecture, applied in the field of member object management device, can solve problems such as slow running speed of RTI, and achieve the effects of ensuring space-time consistency, preventing data jitter, and improving running speed
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[0034] Embodiment one, see figure 1 As shown, the member node device in a simulation system of this embodiment includes: a plurality of parallel core processors, simulation interface units, memory, storage, external interface units, power supply units, and a main board, each of the units 1. The device is set on the main board, and a data bus is established on the main board to coordinate and control the data distribution and reception among various units and devices. At the same time, it can solve the bus dispute arbitration problem. All units and devices set on the main board are It is connected and communicated through the bus interface. The parallel core processor can be a programmable logic device or a system-on-chip. An algorithm or a data management pipeline is established through logic programming. Each pipeline can be executed in parallel, which greatly improves the computing speed. It is the processing core of the whole device, and is mainly responsible for completin...
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