Multi-resistance-state resistance random access memory and method for implementing multiple resistance states utilizing same
A resistive memory, memory technology, applied in static memory, digital memory information, information storage, etc., can solve the problems of insufficient research on multi-value memory applications, low power consumption and process compatibility, and improve storage density and compatibility. Good, simple craftsmanship
Patent Information
- Authority / Receiving Office
- CN · China
- Current Assignee / Owner
- Publication Date
- 2012-01-04
- Estimated Expiration
- Not applicable · inactive patent
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Abstract
Description
technical field
[0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a multi-resistance resistive variable memory and a method for realizing multi-resistance using the same. Background technique
[0002] Traditional memories use binary to complete information storage, which is commonly referred to as 0 and 1. With the development of the integrated circuit industry, the market has higher and higher performance requirements for memories - low power consumption, high speed, Easy integration and multi-value storage, etc. In multi-value storage, each node is required to generate multiple (for example, four) stable states (multiple resistance states in resistive memory), so as to correspond to different storage values one-to-one. The application of multi-value storage technology can Improving storage density and increasing storage capacity will greatly promote the development of memory.
[0003] Resistive variable memory is a new...
Examples
Embodiment Construction
[0026] A multi-resistance RRAM (also referred to as a multi-level RRAM) proposed by the present invention will be described in detail below with reference to the drawings and embodiments.
[0027] The multi-resistance resistive variable memory of the present invention is a MIM structure (MIM refers to a sandwich structure composed of metal, insulator, and metal three-layer film), including a top electrode (TE), a resistive variable layer (for oxide) and a bottom electrode ( BE). The metals of the top and bottom electrodes are prepared by sputtering, evaporation or MOCVD (metal organic compound chemical vapor deposition), SiO 2 Prepared by plasma-enhanced chemical vapor deposition. Such as figure 1 As shown, the embodiment of the present invention is Ag / SiO 2 / Pt / Ti / SiO 2 A multi-level resistance resistive memory device with / Si structure. Utilizing the bipolar resistance switching characteristics of the device, the resistance switching memory can generate four resistance ...