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Method for forming cvd-ru film and method for manufacturing semiconductor devices

A manufacturing method and semiconductor technology, which can be used in semiconductor/solid-state device manufacturing, semiconductor devices, and semiconductor/solid-state device components, etc., and can solve the problems of poor wettability and voids in Cu plating.

Inactive Publication Date: 2012-02-08
TOKYO ELECTRON LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] However, when the Cu seed film is formed after the CVD-Ru film is formed, in fact, the wettability of Cu to the sidewall of the trench or hole deteriorates, and when Cu plating is used to bury the trench or hole, there may be cases where Cu plating Gap occurs in

Method used

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  • Method for forming cvd-ru film and method for manufacturing semiconductor devices
  • Method for forming cvd-ru film and method for manufacturing semiconductor devices
  • Method for forming cvd-ru film and method for manufacturing semiconductor devices

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no. 1 Embodiment approach

[0048] First, the first embodiment will be described. figure 1 is a flowchart showing the method of the first embodiment of the present invention, Figure 2A ~ Figure 2F is the process sectional view.

[0049] In the first embodiment, first, the Si substrate 11 having SiO 2 The interlayer insulating film 12 of the film, the semiconductor wafer (hereinafter simply referred to as wafer) on which the groove 13 is formed (step 1, Figure 2A ). Next, on the entire surface including the groove 13, for example, a barrier film 14 of Ti or the like is formed with a thickness of 1 to 10 nm, for example, about 4 nm by PVD such as sputtering (step 2, Figure 2B ). Next, on the barrier film 14, ruthenium carbonyl (Ru 3 (CO) 12 ) as a film-forming raw material to form a CVD-Ru film 15 with a thickness of 1 to 5 nm, such as about 4 nm (step 3, Figure 2C ). Next, carry out the annealing in hydrogen-containing atmosphere to the wafer that is formed with CVD-Ru film (step 4, Figure 2...

no. 2 Embodiment approach

[0058] Next, a second embodiment will be described. Figure 10 It is a flowchart showing the method of the second embodiment of the present invention, Figure 11A ~ Figure 11G is the process sectional view.

[0059] In the second embodiment, the same wafer as in step 1 of the first embodiment is prepared (step 11, Figure 11A ), as in step 2 of the first embodiment, the barrier film 14 is formed (step 12, Figure 11B ), and then form the CVD-Ru film 15 in the same manner as step 3 of the first embodiment (step 13, Figure 11C ). Thereafter, instead of annealing in a hydrogen-containing atmosphere in step 4 of the first embodiment, annealing is performed in an inert gas such as an Ar gas atmosphere (step 14, Figure 11D ), after that, expose the wafer in the atmosphere (step 15, Figure 11E ). Thereafter, the Cu seed film 16 is formed on the CVD-Ru film 15 in the same manner as Step 5 of the first embodiment (Step 16, Figure 11F ), after that, on the Cu seed film 16, im...

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Abstract

A CVD-Ru film is formed by a process for forming an Ru-film on a substrate by means of CVD using a film-forming material that comprises an organic metal compound, and a process for annealing the substrate upon which the aforementioned Ru film is formed in a hydrogen containing atmosphere.

Description

technical field [0001] The present invention relates to a method of forming a CVD-Ru film used as a base of Cu wiring and a method of manufacturing a semiconductor device. Background technique [0002] Recently, in response to the high speed of semiconductor devices, miniaturization of wiring patterns, and high integration requirements, it is necessary to reduce the capacity between wirings, improve the conductivity of wiring, and improve electromigration resistance. , Copper (Cu), which is more conductive than aluminum (Al) or tungsten (W) and has excellent electromigration resistance, is used as a wiring material, and Cu with a low dielectric constant film (Low-k film) is used as an interlayer insulating film Multilayer wiring technology has attracted much attention. [0003] As a method of forming Cu wiring at this time, it is known to form barriers made of Ta, TaN, Ti, etc. on a Low-k film formed with grooves or holes by physical vapor deposition (PVD) represented by sp...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/3205C23C16/18H01L21/285H01L23/52
CPCC23C16/16C23C16/56H01L21/28556H01L21/76846H01L21/76864H01L21/76873H01L23/53238H01L2924/0002H01L2924/00C23C16/18H01L21/285H01L21/3205
Inventor 加藤多佳良水泽宁波多野达夫五味淳安室千晃横山敦
Owner TOKYO ELECTRON LTD