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Method for thinning chip

A wafer and thinning technology, which is applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as cost increase and fragmentation, and achieve the effect of reducing production cost, avoiding fragmentation, and reducing the probability of fragmentation.

Inactive Publication Date: 2012-04-04
UNITED MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the use of cutting tools to form the stepped structure 106 also has a certain degree of risk of fragmentation, and additional tool modules are required
However, using photolithography requires additional design of photomasks and additional etching steps, which will increase the cost.

Method used

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  • Method for thinning chip

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Embodiment Construction

[0024] In order to enable those who are familiar with the technical field of the present invention to further understand the present invention, several preferred embodiments of the present invention are listed below, together with the accompanying drawings, to describe in detail the composition of the present invention and the intended achievement effect.

[0025] Please refer to Figure 4 to Figure 6 , is a schematic diagram of the steps of the wafer thinning method according to the first embodiment of the present invention. First, if Figure 4 As shown, a wafer 300 is provided. The chip 300 has an active surface 302 , a back surface 304 and a side surface 306 . There may be multiple semiconductor structures (not shown) on the active surface 302, such as metal oxide semiconductor (metal oxide semiconductor, MOS), complementary metal oxide semiconductor (complementary metal oxide semiconductor, CMOS), photodiode (photo diode) , a metal interconnection, a bonding pad, or a ...

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Abstract

The invention discloses a method for thinning a chip. The method comprises the steps that: firstly, a chip is provided, wherein the chip is provided with an active surface, a back surface and a side surface, the active surface is arranged opposite to the back surface, and the side surface is arranged between the active surface and the back surface and surrounds on the periphery of the chip; then, a protection structure is formed on the chip and at least completely coats the side surface; and at last, the chip is thinned from the back surface.

Description

technical field [0001] The invention relates to a method for thinning a wafer, in particular to a method capable of reducing cracks generated in the thinning process of the wafer. Background technique [0002] In recent years, various electronic products are aimed at being light, thin, short, and small. In order to increase the integrity of electronic products, manufacturers are devoting themselves to research and development of new manufacturing technologies, such as the "wafer thinning" manufacturing process. The wafer thinning technology has a wide range of applications, such as the back side illuminated (BSI) technology developed in photo-sensors in recent years. The backlight photosensitive technology collects light through the back of the pixel area, so it will not be shielded by the front circuit, and can increase the effective area of ​​the pixel, so it can avoid the noise problem that is easy to generate in the traditional front photosensitive technology. In additi...

Claims

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Application Information

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IPC IPC(8): H01L21/00
Inventor 谢丞聿
Owner UNITED MICROELECTRONICS CORP
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