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Method for producing silicon germanium channel P-channel metal oxide semiconductor (PMOS) with high germanium component

A germanium-silicon channel and high germanium technology is applied in the field of improving the germanium composition in the channel of a germanium-silicon PMOS device, and can solve problems such as device performance improvement, partial strain relaxation, lattice misfit dislocation, etc.

Inactive Publication Date: 2014-08-27
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, when the Ge composition is too high, a large number of dislocations and defects will be generated in the SiGe layer due to severe lattice mismatch, resulting in the relaxation of the strained part in the layer, which is not conducive to the improvement of device performance, so Considering the compromise, the Ge composition in the traditional SiGe channel is about 30% to 40%.

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  • Method for producing silicon germanium channel P-channel metal oxide semiconductor (PMOS) with high germanium component
  • Method for producing silicon germanium channel P-channel metal oxide semiconductor (PMOS) with high germanium component
  • Method for producing silicon germanium channel P-channel metal oxide semiconductor (PMOS) with high germanium component

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Embodiment

[0017] In conjunction with the accompanying drawings, the process of making a PMOS device with a channel length of 180nm is further described to illustrate the present invention, and the making process is as follows:

[0018] 1. Clean the silicon substrate;

[0019] Second, deposit a layer of SiO on the silicon substrate by plasma-enhanced chemical vapor deposition (PECVD) 2 Layer 2, its thickness can be 20nm~50nm, such as figure 1 shown;

[0020] Three, by PECVD on SiO 2 Deposit a layer of 100nm silicon nitride (SiN) layer 3 with a compressive stress of -3.5 to -2Gpa on layer 2, and introduce tensile stress into the Si substrate through the silicon nitride (SiN) layer to form a silicon nitride (SiN) layer with tensile stress Strained silicon (Si) layer 4, such as figure 1 shown;

[0021] Fourth, use dry etching to etch out the isolation region STI5, such as figure 2 shown;

[0022] 5. Deposit SiO by plasma enhanced chemical vapor deposition (PECVD) 2 Filler to STI, a...

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Abstract

A method for producing a silicon germanium channel P-channel metal oxide semiconductor (PMOS) with a high germanium component belongs to the field of semiconductor devices, and particularly relates to a method for improving the Ge component in a SiGe PMOS channel so as to improve the device performance. The method is characterized in that: a SiN layer is utilized to bring strain into Si for forming strained Si, the strain in a memory strained Si of a shallow-trench isolation area (abbreviated to STI) is utilized to remove the SiN layer, a channel is arranged on the strained Si along a SiGe layer with a higher Ge component, so a transistor is produced. The technology of the method is simple, compared with the traditional metal oxide semiconductor (MOS), the method has a compatible technology, is lower in cost, the obviously improved Ge component in the channel, not only is suitable for small devices being less than a 90 nanometer technological node, but also can be applied for larger devices of above 0.13micrometer.

Description

Technical field [0001] The invention belongs to the field of semiconductor devices, in particular to a method for increasing germanium (Ge) composition in a channel of a silicon germanium (SiGe) PMOS device, so as to improve device performance. Background technique [0002] In modern semiconductor technology, improving the performance of semiconductor devices is a very important topic. Improving carrier mobility is one of the effective measures to increase the driving current of semiconductor devices, and the improvement of carrier mobility can be achieved by introducing strain in the channel. [0003] In strained silicon technology, the tensile stress in the channel region of MOS transistors (sometimes called MOS transistors or MOS devices) can increase the mobility of electrons, and the compressive stress can increase the mobility of holes. Generally speaking, tensile stress is introduced into the channel region of N-type metal oxide semiconductor field effect transistor ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336
Inventor 王向展王微曾庆平罗谦郑良辰刘斌甘程
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA